A process simulation model for multilayer structures involving polycrystalline silicon

Mei, Len; Dutton, R.W.

doi:10.1109/t-ed.1982.21017

Cited by 24 publications

(15 citation statements)

References 12 publications

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“…where NA is the doping concentration, ni is the intrinsic carrier concentration, and impurity level EA, is (15 By varying u0, therefore, the correspbnding u, and L can be calculated using Eq. [5] and [7]2 The resistivity is then obtained from (15)…”

Section: Science and Technologymentioning

confidence: 99%

“…In order to fabricate larger-area SOI structures without grain boundaries and with complete control of the crystallographic orientation, seeded lateral epitaxy technique has recently been studied (4,5). In this technique, a region where the polysilicon is in direct contact with the silicon substrate serves as a seed for lateral crystal growth to the area where the polysilicon is over an insulating layer.…”

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confidence: 99%

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The Effect of Film Thickness on the Electrical Properties of LPCVD Polysilicon Films

Lü¹

1984

J. Electrochem. Soc.

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The effect of film thickness on the electrical properties of boron-doped LPCVD polysilicon films with doping concentration ranging from 1 x 1017 to 1 x 10 TM cm-3 has been characterized from 1.2 ~m down to 0.1 ~m. The resistivity increases exponentially as the film thickness decreases, rather than remaining constant, and the rate of increase is a strong function of doping concentration. After a quantitative study on the physical mechanisms which can affect the resistivity as film thickness decreases, the carrier trapping effect due to grain-size variation at different film thicknesses is shown to be the dominant factor. A trapping model without assuming the depletion approximation can explain well the experimental data and enhances understanding of the resistivity behavior as the polysilicon film thickness decreases.

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Section: Science and Technologymentioning

confidence: 99%

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confidence: 99%

The Effect of Film Thickness on the Electrical Properties of LPCVD Polysilicon Films

Lü¹

1984

J. Electrochem. Soc.

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“…dopants in polysilicon. 13,14,19 The highest local segregation coefficient was measured to be only about 3.0 at the lowest flash temperatures. Higher temperatures and longer anneals significantly reduce the coefficient of locally segregated B at a single grain to about 1.5,…”

Section: Resultsmentioning

confidence: 97%

“…Grain growth was found to significantly reduce the amount of segregated B due to the reduction in grain boundary surface area. Values obtained from the experimental data were applied to a poly-Si diffusion model, 13,14 which accurately predicts diffusion of B in flash annealed poly-Si. Hall measurements suggest that the segregated B is electrically inactive.…”

Section: Introductionmentioning

confidence: 99%

B segregation to grain boundaries and diffusion in polycrystalline Si with flash annealing

Jin

Jones

Law

et al. 2012

Journal of Applied Physics

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Three-dimensional atom probe tomography was used to characterize the segregation of B dopant atoms to grain boundaries in polycrystalline Si after flash-assisted rapid thermal annealing. Tomographic reconstructions allowed direct measurement of segregation coefficients, which were found to be greater at lower flash temperatures with thermal budgets that limit grain growth. Hall measurements confirmed the deactivation of B at the grain boundaries, while secondary ion mass spectrometry was used to measure B diffusion in the film. Experimental parameters were then simulated in a diffusion model which accurately predicts the diffusion of B in polycrystalline Si at flash temperatures of 1150 C, 1250 C, and 1350 C, as well as with conventional rapid thermal annealing. V

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“…Mei and Dutton [11] have shown that the dopant segregation at the grains boundaries diminishes, in one hand with the thickness of the polycrystalline silicon film, and on the other hand with the increase of the grains size.…”

Section: Experimental Conditionsmentioning

confidence: 99%

Effect of the Heat Treatments on the Dopes Segregation in Polycrystalline Silicon Films

Silini¹,

Chouial²,

Hadjoudja³

et al. 2012

JMP

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In this work we are interested in studying the effect of the heat treatments on the dopant segregation at the grain boundaries in the polycrystalline silicon films. The obtained results have shown that the heat treatments reduce the number of segregation sites at the grains boundaries, and consequently they limit the structural changes that can appear there and the quantity of the dope atoms that can accumulate in these boundaries. In addition they are more and more dopant that are found inside the grains when the temperature of the heat treatment increases. On the other hand, we established that the arsenic atoms have a strong tendency to the segregation than the boron atoms, and we have noticed a strong migration of arsenic atoms from the boundaries towards the grains under the effect of the heat treatments. It was also shown that the segregation of arsenic atoms at the grains boundaries is about 4 times higher than that of the boron atoms

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A process simulation model for multilayer structures involving polycrystalline silicon

Cited by 24 publications

References 12 publications

The Effect of Film Thickness on the Electrical Properties of LPCVD Polysilicon Films

The Effect of Film Thickness on the Electrical Properties of LPCVD Polysilicon Films

B segregation to grain boundaries and diffusion in polycrystalline Si with flash annealing

Effect of the Heat Treatments on the Dopes Segregation in Polycrystalline Silicon Films

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