A practical /spl Delta/-/spl Sigma/ modulator design method based on periodical behavior analysis

Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators

“…Moreover, sample simulations were performed for , 5, and all confirmed the results in Table II. Table II compares the results of this study with the state-of-the-art results in [12]. Note that increasing the order of the HK-EFM by 1 increases the cycle length by a factor of approximately compared to a factor of no more than 4 in the conventional case.…”

“…Compared to a conventional modulator , a pole at is added to both the STF and the NTF. If is sufficiently small, this pole is very close to the origin in the z plane; equivalently, it is a distant pole [12] that does not significantly affect the overall operation of the modulator [1]. Simulation shows that the effect of this pole is negligible from the stability standpoint for .…”

“…An alternative (deterministic) approach is to avoid known short sequences by setting the initial conditions of the internal registers of the EFM [12]. Another deterministic way of increasing the sequence length is to modify the architecture [1] in such a way that the sequence length inherently attains the maximum possible value.…”

Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM

“…In this example, , and the noise transfer function is given by (4) Note that the error cancellation network completely removes the quantization errors of the first two stages.…”

“…The deterministic approach to whitening the quantization noise is to guarantee maximum cycle lengths by design. Kozak and Kale [3] and, more recently, Borkowski et al [4], [5] have shown that the MASH 111 DDSM does not exhibit large spurs when the input is constant and the initial condition of the first stage is odd, due to the inherent whitening of the quantization error spectrum.…”