A positive-feedback transconductance amplifier with applications to high-frequency, high-Q CMOS switched-capacitor filters

Laber, C.A.; Gray, P.R.

doi:10.1109/4.90033

Cited by 64 publications

(67 citation statements)

References 11 publications

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“…Gain boosting with positive feedback has been investigated, e.g. in [169] and [170]. In [171], dynamic biasing, where the opamp current is decreased toward the end of the settling phase, is used to increase the DC gain.…”

Section: Gain Enhancement Techniquesmentioning

confidence: 99%

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Waltari¹,

Halonen²

2003

The International Series in Engineering and Computer Science

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The increasing digitalization in all spheres of electronics applications, from telecommunications systems to consumer electronics appliances, requires analog-to-digital converters (ADCs) with a higher sampling rate, higher resolution, and lower power consumption. The evolution of integrated circuit technologies partially helps in meeting these requirements by providing faster devices and allowing for the realization of more complex functions in a given silicon area, but simultaneously it brings new challenges, the most important of which is the decreasing supply voltage.Based on the switched capacitor (SC) technique, the pipelined architecture has most successfully exploited the features of CMOS technology in realizing high-speed high-resolution ADCs. An analysis of the effects of the supply voltage and technology scaling on SC circuits is carried out, and it shows that benefits can be expected at least for the next few technology generations. The operational amplifier is a central building block in SC circuits, and thus a comparison of the topologies and their low voltage capabilities is presented.It is well-known that the SC technique in its standard form is not suitable for very low supply voltages, mainly because of insufficient switch control voltage. Two low-voltage modifications are investigated: switch bootstrapping and the switched opamp (SO) technique. Improved circuit structures are proposed for both. Two ADC prototypes using the SO technique are presented, while bootstrapped switches are utilized in three other prototypes.An integral part of an ADC is the front-end sample-and-hold (S/H) circuit. At high signal frequencies its linearity is predominantly determined by the switches utilized. A review of S/H architectures is presented, and switch linearization by means of bootstrapping is studied and applied to two of the prototypes. Another important parameter is sampling clock jitter, which is analyzed and then minimized with carefully-designed clock generation and buffering.The throughput of ADCs can be increased by using parallelism. This is demonii strated on the circuit level with the double-sampling technique, which is applied to S/H circuits and a pipelined ADC. An analysis of nonidealities in double-sampling is presented. At the system level parallelism is utilized in a time-interleaved ADC. The mismatch of parallel signal paths produces errors, for the elimination of which a timing skew insensitive sampling circuit and a digital offset calibration are developed. A total of seven prototypes are presented: two double-sampled S/H circuits, a time-interleaved ADC, an IF-sampling self-calibrated pipelined ADC, a current steering DAC with a deglitcher, and two pipelined ADCs employing the SO technique.

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Section: Gain Enhancement Techniquesmentioning

confidence: 99%

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Waltari¹,

Halonen²

2003

The International Series in Engineering and Computer Science

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“…From the open-loop pole p expression (4). it is observed that as Rn is decreased, the open-loop pole crosses into the right half-plane when 1/Rn = -g*,.…”

Section: ) CLmentioning

confidence: 99%

“…This gain stage introduces internal nodes and thus limits the high-frequency response of the amplifier. Laber and Gray [4] described a CMOS folded cascoded operational transconductance amplifier that achieved high DC gain by using an internal positive feedback loop. The positive feedback loop generates a negative conductance which is used to compensate a positive conductance plus a positive transconductance.…”

Section: Problems Of Existing Circuit Implementations Of the Negativementioning

confidence: 99%

“…Although the negative output impedance compensation technique has been around for quite a while [4][11] [22][23] [24] [25], it has received little attention. This gain enhancement technique is also termed positive feedback gain enhancement technique because it applies positive feedback to generate a compensating negative conductance for the purpose of enhancing the amplifier gain.…”

Section: High Gain Amplifiersmentioning

confidence: 99%

“…Many analog and mixed signal systems have performance that is limited by the settling behavior of op amps. These include switched capacitor filters [2][3] [4], algorithmic A/D converters, sigma-delta converters, sample and hold circuits [5] [6], and pipelined A/D converters [7][8] [9]. In these circuits the settling behavior of the op amp determines the accuracy and the speed that can be reached.…”

Section: Chapter 1 Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Strategies for enhancing DC gain and settling performance of amplifiers

Yan

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Modified telescopic amplifier with improved DC gain in 0.18 µm CMOS process

Dadashi

2011

Circuit Theory & Apps

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A new operational amplifier is presented based on the conventional telescopic amplifier structure. A novel method is used to increase the DC gain of the telescopic amplifier. This method does not degrade the output swing, bandwidth, settling time and the phase margin of the telescopic amplifier. Proposed structure has been simulated by HSPICE software using level 49 parameters (BSIM3v3) in a typical 0.18 mm Complementary metal-oxide-semiconductor (CMOS) technology. HSPICE simulation confirms the theoretical estimated improvements.

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A positive-feedback transconductance amplifier with applications to high-frequency, high-Q CMOS switched-capacitor filters

Cited by 64 publications

References 11 publications

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Strategies for enhancing DC gain and settling performance of amplifiers

Modified telescopic amplifier with improved DC gain in 0.18 µm CMOS process

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