A poly-Si TFT fabricated by excimer laser recrystallization on floating active structure

Kim, Cheon-Hong; Song, Inho; Nam, Woo‐Jin; Han, Min−Koo

doi:10.1109/led.2002.1004220

Cited by 34 publications

(16 citation statements)

References 11 publications

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“…Amorphous IGZO TFTs typically have mobilities of 4-11 cm 2 /Vs [4][5][6], which are observably higher than 0.1-0.6 cm 2 /Vs of conventional amorphous Si TFTs [7,8]. Polycrystalline Si (poly-Si) TFTs are known to have high mobilities [9,10]. However, the poly-Si thin film is usually obtained by excimer laser annealing of an amorphous Si film, which is grown by chemical vapor deposition (CVD).…”

Section: Introductionmentioning

confidence: 99%

“…However, the poly-Si thin film is usually obtained by excimer laser annealing of an amorphous Si film, which is grown by chemical vapor deposition (CVD). Thus, poly-Si TFTs usually have high process complexity, high production cost, high process temperature and low process compatibility [9][10][11][12]. These disadvantages cause that they are difficult to be applied to future flexible electronic applications.…”

Section: Introductionmentioning

confidence: 99%

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Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric

Hsu

Chu

Sun

et al. 2016

J. Display Technol.

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Abstract-In this work, low temperature fabrication of an amorphous InGaZnO thin film transistor (a-IGZO TFT) was demonstrated. The maximum process temperature was 200 °C. The gate dielectric was a sol-gel SiO 2 film while the channel layer was a sputtered a-IGZO semiconductor. The optimal sol-gel film for gate dielectric application was obtained by considering effects of surfactant, solvent, plasma treatment and curing process on the film characteristics. The reasons for leakage current variations of the sol-gel films prepared with different conditions were examined by a scanning electron microscope and Fourier-transform infrared analysis. The leakage current mechanism of the optimal sol-gel SiO 2 film was found to be dominated by Ohmic conduction. The characteristics of a-IGZO layers deposited with oxygen flow rates of 0-3 sccm were investigated. By integrating the optimal sol-gel SiO 2 dielectric and the sputtered a-IGZO layer, we successfully fabricated the TFT with a field effect mobility of 6.4 cm 2 /Vs. The interface trap density between the sol-gel SiO 2 and the a-IGZO layer was found to be 9.2 × 10 11 cm -2 eV -1 .

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric

Hsu

Chu

Sun

et al. 2016

J. Display Technol.

View full text Add to dashboard Cite

show abstract

“…12) In the meantime, the lateral thermal gradient along the Y-Y 0 direction also exists owing to the surface tension effect and the 2D cooling path during laser irradiation. The cooling rate of the edge region is faster than that of the central region and leads to solidification first because of the smaller heat capacity of the thinner silicon thin film 8,9) and 2D cooling path, 10) as shown in Fig. 4(b).…”

Section: Resultsmentioning

confidence: 99%

“…[5][6][7] However, the small-dimensional TFTs fabricated by the crystallization method exhibited a higher mobility but with the poor uniformity of the device performance because grain boundaries were randomly distributed and were a critical issue for scale down to achieve the SOP with the integrated TFT circuits and 3D-ICs. Thus, various grain-boundary-controlled methods via the laser crystallization of a prepatterned active layer, such as the adoption of an air gap structure 8,9) and a light absorption layer 10) have been proposed. However, these methods required complex fabrication processes to control the locations of grain boundaries two-dimensionally.…”

Section: Introductionmentioning

confidence: 99%

High-Performance Excimer-Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors with the Pre-Patterned Recessed Channel

Wang

Cheng²,

Lee

et al. 2012

Jpn. J. Appl. Phys.

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High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) have been achieved using an excimer laser crystallization method on a prepatterned recessed channel (RC). Such a prepatterned RC TFT exhibited an excellent field-effect mobility of 412 cm 2 V À1 s À1 and an on/off current ratio higher than 1:1 Â 10 8 as compared with 125 cm 2 V À1 s À1 and 2:2 Â 10 7 for the conventional ones, respectively. This is attributed to the two-dimensional control of the grain boundary location and the resultant cross-shaped grain boundary structures within the recessed regions. Therefore, the prepatterned RC TFTs with only one grain boundary parallel to the channel direction as the TFTs could be fabricated to avoid the perpendicular grain boundary. This technology is thus promising for the future applications of poly-Si TFTs in the system-on-panel (SOP) and three-dimensional integrated circuits (3D-ICs).

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“…11,12 Several groups therefore study the possibilities to control the location and density of grain boundaries using laser crystallization. 13,14,15,16,17,18 Pulsed-laser crystallization was chosen for this work to achieve a (brief) high temperature in the thin film while maintaining a low substrate temperature by avoiding sustained heating. The latter is crucial to enable post-processing on top of a CMOS chip, where the temperature should not exceed 400 • C to prevent any damage to the underlying circuitry.…”

mentioning

confidence: 99%

Laterally Confined Large-Grained Poly-GeSi Films: Crystallization and Dopant Activation Using Green Laser

Rangarajan

Kovalgin

Oesterlin

et al. 2012

ECS J. Solid State Sci. Technol.

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This paper reports crystallization with a pulsed Yb:YAG thin disk laser (λ = 515 nm) of amorphous Ge 0.85 Si 0.15 films approximately 100 nm thick, on silicon wafers with thermal oxide. Pre-patterned lines were employed to steer the crystallization and to form confined large grains. In total, 64% of the grains were longer than 2 μm, among them 40% were reaching 8-35 μm in length. These values, orders of magnitude larger than the layer thickness, were a result of so-called super-lateral growth. The grains were laterally confined within a 3 μm wide space. The crystallization led to a substantial residual tensile stress with a strain of 3.4%. Green-laser activation of BF 2 + , As + and P + implants was studied in amorphous and polycrystalline Ge 0.85 Si 0.15 films and led to successful dopant activation with resistivity values in the range of 5-20 m -cm achieved for all the implants.

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A poly-Si TFT fabricated by excimer laser recrystallization on floating active structure

Cited by 34 publications

References 11 publications

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric

High-Performance Excimer-Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors with the Pre-Patterned Recessed Channel

Laterally Confined Large-Grained Poly-GeSi Films: Crystallization and Dopant Activation Using Green Laser

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A poly-Si TFT fabricated by excimer laser recrystallization on floating active structure

Cited by 34 publications

References 11 publications

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO2Gate Dielectric

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO2Gate Dielectric

High-Performance Excimer-Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors with the Pre-Patterned Recessed Channel

Laterally Confined Large-Grained Poly-GeSi Films: Crystallization and Dopant Activation Using Green Laser

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Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric

Low Temperature Fabrication of an Amorphous InGaZnO Thin-Film Transistor With a sol-gel SiO₂Gate Dielectric