A $\pm$0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications

Lü, Yan; Yuan, Gang; Der, L.; Ki, Wing-Hung; Yue, C. Patrick

doi:10.1109/tcsii.2013.2277984

Cited by 18 publications

(10 citation statements)

References 5 publications

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“…M R5 and M R6 in Fig. 4 are biased in the subthreshold region, and their drain currents can be expressed with equation (3). The voltage across resistor R is 5 − 6 ≈ n ln 6 5 6 5 ,…”

Section: A Ptat Current Referencementioning

confidence: 99%

“…The frequency drift of the relaxation oscillator is mainly caused by the changes of polysilicon resistors and bias currents due to process, voltage and temperature (PVT) variations [3]. A relaxation oscillator that utilizes electron mobility has been reported in [2], which realizes temperature compensation and is inherently process insensitive.…”

Section: Introductionmentioning

confidence: 99%

“…A relaxation oscillator that utilizes electron mobility has been reported in [2], which realizes temperature compensation and is inherently process insensitive. A pseudo-differential architecture can be employed to avoid frequency fluctuations caused by bias current variations [3], [4]. Composite resistors, which are created by mixing polysilicon resistors with opposite temperature coefficients, are sometimes employed to achieve a near-zero temperature coefficient (TC) [3], [5].…”

Section: Introductionmentioning

confidence: 99%

“…A pseudo-differential architecture can be employed to avoid frequency fluctuations caused by bias current variations [3], [4]. Composite resistors, which are created by mixing polysilicon resistors with opposite temperature coefficients, are sometimes employed to achieve a near-zero temperature coefficient (TC) [3], [5]. A relaxation oscillator with two current-mode comparators and integrated latches [7] offers a compact alternative to the commonly used combination of comparators, voltage references, and digital control logic.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A low-power temperature-compensated relaxation oscillator for built-in test signal generation

Liu

Onabajo

2015

2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)

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An on-chip frequency reference for built-in testing and calibration applications is presented. The design combines a proportional-to-absolute-temperature (PTAT) current reference and a relaxation oscillator core. A temperature compensation scheme is realized based on the thermal voltage, for which simulations indicate low sensitivity to process variations. The oscillator was designed and simulated in a 130nm CMOS process with a power supply of 1.2V. It generates a 40KHz output and occupies a layout area of 0.025mm 2 . A temperature coefficient of 101ppm/°C is achieved over the range from -30°C to 85°C. The simulated phase noise is -90dBc/Hz at 10KHz offset.Keywords -On-chip frequency reference; low-power relaxation oscillator; temperature compensation; process insensitivity; built-in test signal generation.I.

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“…M R5 and M R6 in Fig. 4 are biased in the subthreshold region, and their drain currents can be expressed with equation (3). The voltage across resistor R is 5 − 6 ≈ n ln 6 5 6 5 ,…”

Section: A Ptat Current Referencementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A low-power temperature-compensated relaxation oscillator for built-in test signal generation

Liu

Onabajo

2015

2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)

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“…It could not offset the variation of reference voltage too. De Smedt, De Wit, Vereecken, and Steyaert (2009) , Lu, Yuan, Der, Ki, and Yue (2013), Sebastiano et al (2011aSebastiano et al ( , 2011b, Ueno, Asai, and Amemiya (2009) reported on-chip clock oscillators with high accuracy, but their accuracy relied on special resistors or trimming and they are not pure PVT compensation on-chip. In Sebastiano et al (2011a), the authors followed the idea of Blauschild (1994), but the compensation was off-chip.…”

Section: Introductionmentioning

confidence: 99%

Process, voltage and temperature compensation in a 1-MHz 130nm CMOS monolithic clock oscillator with 2.3% accuracy

Bian

Yao

2014

International Journal of Electronics

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This paper presents an on-chip process, voltage and temperature (PVT) compensation technique for a 1-MHz monolithic clock oscillator in a CMOS process. The oscillator is based on carrier mobility and frequency-to-voltage converter (FVC), which is based on charge pump circuit. An adaptive charge current maintains a constant frequency without trimming. Furthermore, a reference voltage with a second-order temperature coefficient further compensates the variation of frequency with temperature. It improves the accuracy of existing carrier-mobility-based oscillator, from 4.5% to 2.3%. The circuit was designed in a 130 nm CMOS 3.3 V device process. The results show that the output frequency is within AE 2.3% variation in the worst case. The variations of frequency with process, temperature (−40 to 125°C) and power supply are within AE 1.8%, AE 0.8% and AE 0.2%/V, respectively. It achieves a CMOS monolithic clock oscillator insensitive to PVT.

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A Sub- $${100\,\hbox {ppm}/{^{\circ }\hbox {C}}}$$ 100 ppm / ∘ C Temperature-Compensated High-Frequency CMOS Relaxation Oscillator

Sakphrom

Georgiou

Thanachayanont

2015

Circuits Syst Signal Process

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A temperature-compensated high-frequency CMOS integrated relaxation oscillator with low frequency variations is presented. A current-controlled oscillator topology is employed with a resistive source-degenerated transconductor and a current comparator to achieve high oscillation frequency and low power dissipation. The proposed oscillator was designed with process parameters from a standard 0.35-µm CMOS technology and a 2.5-V single power supply voltage. At a nominal oscillation frequency of 21 MHz, the total power dissipation of the circuit was 201 µW. Post-layout simulation results showed that the frequency variations were less than 34.16 ppm/ • C over a temperature range of −40 to +120 • C.

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A $\pm$0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications

Cited by 18 publications

References 5 publications

A low-power temperature-compensated relaxation oscillator for built-in test signal generation

A low-power temperature-compensated relaxation oscillator for built-in test signal generation

Process, voltage and temperature compensation in a 1-MHz 130nm CMOS monolithic clock oscillator with 2.3% accuracy

A Sub- $${100\,\hbox {ppm}/{^{\circ }\hbox {C}}}$$ 100 ppm / ∘ C Temperature-Compensated High-Frequency CMOS Relaxation Oscillator

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