A Phase-Interpolation and Quadrature-Generation Method Using Parametric Energy Transfer in CMOS

Abstract

This work focuses on generation of quadrature clocks with high phase accuracy and low noise, while reducing area and power consumption. The design objective is to make these quadrature oscillators suitable for applications in power-and area-constrained SOCs. We demonstrate in this work quadrature clock generation using parametric capacitance modulation in CMOS technology. We present a quadrature-generation method that is based on parametric energy transfer to an LC resonator. The phase-sensitive nature of parametric pumping is used to generate a signal in quadrature with an incoming clock signal. The design also provides the capability of phase interpolation about quadrature, which is useful in many applications. The detailed system implementation is demonstrated and experimentally verified through a prototype in 65 nm CMOS.