A Parallel Sliding-Window Generator for High-Performance Digital-Signal Processing on FPGAs

Stitt, Greg; Schwartz, Eric M.; Cooke, Patrick

doi:10.1145/2800789

Cited by 6 publications

(3 citation statements)

References 16 publications

(21 reference statements)

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“…Gebotys et al [22] proposed a sliding window phase-only correlation algorithm for synchronizing the electromagnetic radiation emitted by a complex smartphone that uses a chip cache to run its native code. Stitt et al [23] proposed a parallel sliding window coding algorithm, which can generate multiple parallel windows equal to the number of inputs provided in each cycle. Tan et al [24] proposes a hierarchical LMS prediction algorithm, which can significantly improve the convergence rate of the algorithm in the initial state of the algorithm, thus reducing the number of actual packet transmitted to the destination node.…”

Section: Related Workmentioning

confidence: 99%

Network Coding-based Maximum Lifetime Algorithm for Sliding Window in WSNs

2019

KSII TIIS

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Network coding (NC) is a promising technology that can improve available bandwidth and packet throughput in wireless sensor networks (WSNs). Sliding window is an improved technology of NC, which is a supplement of TCP/IP technology and can improve data throughput and network lifetime on WSNs. This paper proposes a network coding-based maximum lifetime algorithm for sliding window in WSNs (NC-MLSW) which improves the throughput and network lifetime in WSN. The packets on the source node are sent on the WSNs. The intermediate node encodes the received original packet and forwards the newly encoded packet to the next node. Finally, the destination node decodes the received encoded data packet and recovers the original packet. The performance of the NC-MLSW algorithm is studied using NS2 simulation software and the network packet throughput, network lifetime and data packet loss rate were evaluated. The simulations experiment results show that the NC-MLSW algorithm can obviously improve the network packet throughput and network lifetime. He is currently a professor at the school of information and engineering in the Hubei University of Economics, Wuhan, China. His research interests include wireless communication, performance analysis and modeling. He has published over 60 research papers.Ying Song received her PhD degree in photogrammetry and remote sensing in 2011 and a master degree of geographical information system in 2004 from the . Her research interests include algorithm, wireless communication, performance analysis, and network model. She has published over 20 research papers.

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Section: Related Workmentioning

confidence: 99%

Network Coding-based Maximum Lifetime Algorithm for Sliding Window in WSNs

2019

KSII TIIS

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“…If there are no inter-iteration dependencies and resource conflicts, the tools schedule the iterations of a loop to be continuously initiated at constant intervals [13]. Sliding window applications are a sub-domain of digital signal processing and highly amenable to loop pipelining on FPGAs [22]. Fowers et al [10] and Zohouri et al [25] perform extensive analyses of sliding window applications for different use cases by considering performance and energy consumption.…”

Section: Loop Pipeliningmentioning

confidence: 99%

Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs

Lambert

Lee

Kim

et al. 2018

Proceedings of the 2018 International Conference on Supercomputing

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Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FP-GAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and corresponding compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.

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“…The sliding window architecture produces an output of size (N×N), in other words, one value for each pixel in the input image [82]. For example, for an image of size 512×512 and a window of size 3×3, the first window to process is a square between (0,0) and (2,2).…”

Section: It Consists Of a Set Ofmentioning

confidence: 99%

Efficient processing of vision kernels and deep neural networks on reconfigurable computing architectures

Qasaimeh¹

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A Parallel Sliding-Window Generator for High-Performance Digital-Signal Processing on FPGAs

Cited by 6 publications

References 16 publications

Network Coding-based Maximum Lifetime Algorithm for Sliding Window in WSNs

Network Coding-based Maximum Lifetime Algorithm for Sliding Window in WSNs

Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs

Efficient processing of vision kernels and deep neural networks on reconfigurable computing architectures

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