International Conference on Field Programmable Logic and Applications, 2005.
DOI: 10.1109/fpl.2005.1515751
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A parallel MPEG-4 encoder for FPGA based multiprocessor SoC

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Cited by 22 publications
(9 citation statements)
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“…System takes about 36 400 logic elements which is 88% of logic resources on Altera Stratix 1S40 FPGA. Furthermore, an MPEG-4 video encoder has been implemented on HIBI-based 4-processor system on a single FPGA [43]. In all cases, HIBI has met all the performance requirements with clear margin and enabled simple integration of system components.…”
Section: Performance Evaluationmentioning
confidence: 99%
“…System takes about 36 400 logic elements which is 88% of logic resources on Altera Stratix 1S40 FPGA. Furthermore, an MPEG-4 video encoder has been implemented on HIBI-based 4-processor system on a single FPGA [43]. In all cases, HIBI has met all the performance requirements with clear margin and enabled simple integration of system components.…”
Section: Performance Evaluationmentioning
confidence: 99%
“…Research efforts have been made to address the efficiency problems of generalpurpose processors (including video decoding and encoding) in multimedia application. Various approaches have been explored to improve hardware efficiency, including specialized instructions [34], customized architectures [35], GPU offloading [36], application specific integrated circuit (ASIC) [37], and FPGA-based accelerators [38]. Computer clusters are a well-known configuration of distributed systems used to provide high-throughput computing.…”
Section: Related Workmentioning
confidence: 99%
“…Our parallel video encoder software is based on horizontal spatial parallelization [12]. Briefly, the application consists of a master processor (Nios) that controls the encoding flow, collects the bitstream, and handles the I/O, such as sending data back and forth with a PC via Ethernet.…”
Section: Mpeg-4 Applicationmentioning
confidence: 99%