A one volt four-quadrant analog current mode multiplier cell

Chan, Cheong-Fat; Ling, H.-S.; Choy, Oliver C.S.

doi:10.1109/4.406401

Cited by 13 publications

(4 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The relative error due to the finite current gain of the used BJTs in the TLRLA multiplier/divider circuit, according to (4), is calculated as For the proposed multiplier/divider circuit, according to ( S ) , the corresponding relative error is given by (7) It is important to discuss two cases:…”

Section: P-error Analysismentioning

confidence: 99%

“…There are many advantages to be gained from a wider view of analogue signal processing involviing current-mode techniques. Using this approach, the most popular types of bipolar 0-7803-5276-9/991$10.00 0 1999 IEEE 525 analog multipliers/dividers are based on Gilbert's translinear principle [1]- [4]. For this class of circuits, the exponential characteristics of the BJT is used.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A β-error elimination in the translinear reduction of the "log-antilog" multiplier/divider

Tadic

IMTC/99. Proceedings of the 16th IEEE Instrumentation and Measurement Technology Conference (Cat. No.99CH36309)

View full text Add to dashboard Cite

A new t p e of the one-quadrant analog multipiYer/divider based on the translinear reduction of the Vog-anMog" (TLRLA) mdt~plier/dir.ider circuit is presented in this paper. A new techniquc for the error elimination due to the finite crnrrent gain $ of the used bipolair junction transistors (BJTS) is described. By ai fding seven BJTs (three emitter followers and two simple current mirrors) to the classical TLRLA rnuklpfier/divider, a significant impro vement in xcuracy is achieved. The lineiwity error is smaller than 0.45 % of full scale, and rehtive error is smaller than 1.2 % of fuil scale? in the 0 A to 3 mA input current range? and in the 0 A to 9 mA output current range. These simulated results have been achieved with a 3 Vsupply.

show abstract

Section: P-error Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A β-error elimination in the translinear reduction of the "log-antilog" multiplier/divider

Tadic

IMTC/99. Proceedings of the 16th IEEE Instrumentation and Measurement Technology Conference (Cat. No.99CH36309)

View full text Add to dashboard Cite

show abstract

“…The MOS weak-inversion region principle based multiplier was used for implementing the Morlet Wavelets [4]. The basic idea of this multiplier was proposed by Chan, et al and is based on the bipolar translinear principle [5]. This multiplier is very simple circuit configuration with the differential input signals.…”

Section: Introductionmentioning

confidence: 99%

High-linear four-quadrant multiplier based on MOS weak-inversion region translinear principle with adaptive bias technique

Tanno

Sugahara

Tamura

2011

TENCON 2011 - 2011 IEEE Region 10 Conference

View full text Add to dashboard Cite

In this paper, we propose the high-linear fourquadrant analog multiplier based on MOS weak-inversion region. Because the proposed multiplier is based on the translinear principle, it is insensitive to the absolute accuracy of the devices and temperature variation. Furthermore, the proposed multiplier has very high linearity by adopting the adaptive bias technique. Simulations of the multiplier demonstrate a nonlinearity of 0.88%, a THD of 1.3%, a −3dB bandwidth of 768kHz, and a power consumption of 1.12µW under the condition that VDD = 1.0V.

show abstract

“…Εκτός από τον πολλαπλασιαστή Gilbert υπάρχουν και άλλοι αναλογικοί πολλαπλασιαστές, οι οποίοι όμως είναι μεγαλύτερης πολυπλοκότητας και απαιτούν της περισσότερα τρανζίστορ για την πραγματοποίηση μιας απλής πράξης του αλγορίθμου άθροισης-πολλαπλασιασμού. Μερικές από τις εναλλακτικές κυκλωματικές διατάξεις αναλογικού πολλαπλασιασμού σημάτων βασίζονται σε ζευγάρια cross-coupled τρανζίστορ σε διπολική και MOS τεχνολογία [92][93][94], ενώ άλλες χρησιμοποιούν την τετραγωνική-διαγραμμική αρχή [95], την αρχή τετραγωνικής ρίζας [96,97] και τις τεχνικές floatinggate MOSFET [98,99].…”

Section: η αναλογική πύλη πιθανοτήτων-κυκλώματα άθροισης πολλαπλασιασμούunclassified

Αρχιτεκτονικές Και Υλοποίηση Κωδίκων Διόρθωσης Λαθών

Γκιουλέκας¹

View full text Add to dashboard Cite

A one volt four-quadrant analog current mode multiplier cell

Cited by 13 publications

References 2 publications

A β-error elimination in the translinear reduction of the "log-antilog" multiplier/divider

A β-error elimination in the translinear reduction of the "log-antilog" multiplier/divider

High-linear four-quadrant multiplier based on MOS weak-inversion region translinear principle with adaptive bias technique

Αρχιτεκτονικές Και Υλοποίηση Κωδίκων Διόρθωσης Λαθών

Contact Info

Product

Resources

About