A Novel Topology of Fifteen Level Multilevel Inverter with Harmonic Elimination Using GASHE

A multilevel inverter using switched capacitors with reduced components

“…In the proposed SCMLI1, the switch per level ( N SW / N L ) is 0.8, which is lower than the CHB topology and topologies presented in [12, 14, 16, 17, 19–24]. The topologies presented in [9–11, 13, 14] requires a lower number of switches than the proposed SCMLI1. However, these topologies require more number of DC sources, and [9] requires more capacitors, too.…”

“…According to Table 3, the proposed SCMLI1 requires a lower number of switches and drivers as compared to the CHB topology and topologies suggested in [14, 17, 20–24]. Also, the proposed SCMLI1 needs a lower number of DC voltage sources as compared to the CHB inverter and topologies of [9–15, 19, 24]. In the proposed SCMLI1, the switch per level ( N SW / N L ) is 0.8, which is lower than the CHB topology and topologies presented in [12, 14, 16, 17, 19–24].…”

“…However, these topologies require more number of DC sources, and [9] requires more capacitors, too. Also, the topologies of [11–13, 15, 20] have a higher amount of TBV. The TBV affects on the power rating of switches and the manufacturing costs.…”

“…The reduced number of switches is the main benefit and a large number of used dc power supplies and capacitors are the main drawbacks of this topology. Some other interesting topologies have been suggested in [10–15]. The fewer number of switches of the presented topologies in [10, 11] and generation of negative levels without any H‐bridge in the topologies presented in [12–15] are the significant advantages of these topologies.…”

“…Some other interesting topologies have been suggested in [10–15]. The fewer number of switches of the presented topologies in [10, 11] and generation of negative levels without any H‐bridge in the topologies presented in [12–15] are the significant advantages of these topologies. Whereas, the numerous used DC power supplies of the presented topologies in [10–15] and high total blocking voltage (TBV) on switches of the suggested topologies in [11–13, 15] are the shortcomings of these topologies.…”