A Novel TFET 8T-SRAM Cell with Improved Noise Margin and Stability

Fani, Seyed Hamid; Peiravi, Ali; Farkhani, Hooman; Moradi, Farshad

doi:10.1109/ddecs.2018.00014

Cited by 7 publications

(2 citation statements)

References 20 publications

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“…The proposed structure exhibits 33% in reading noise margin and 26% in write margin as compared to conventional 6 T SRAM cell for the supply voltage of 0.3 V. The area of the proposed SRAM is larger than the existing one but the features like stability and high performance at very low voltage supply make it useful. The use of the TFET device has limited the working of SRAM cells as it is a unidirectional device but this issue has been resolved by using transistors (n-type and p-type) placed parallelly and the use of one bit-line [49].…”

Section: Impact Of Noise In Tfet Based Circuit and Memory Designmentioning

confidence: 99%

Noise Analysis in Nanostructured Tunnel Field Devices

Chander¹,

Sinha²

2022

21st Century Nanostructured Materials - Physics, Chemistry, Classification, and Emerging Applications in Industry, Biomedicine,

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Tunnel Field Effect Transistors (TFETs) have appeared as an alternative candidate of “beyond CMOS” due to their advantages like very low leakage current and steep sub-threshold slope i.e. <60 mV/dec., etc. From past decades, researchers explored TFETs in terms of high ON current and steep subthreshold slope at low supply voltage i.e. < VDD = 0.5 V. The reliability issues of the device have profound impact on the circuit level design for practical perspectives. Noise is one of the important parameters in terms of reliability and very few research papers addressed this problem in comparison to other parameter study. Therefore, in this chapter, we discussed the impact of noise on Tunnel FET devices and circuits. The detail discussion has been done for the random telegraph noise, thermal noise, flicker noise, and shot noise for Si/Ge TFET and III-V TFETs. Recent research work for both low frequencies as well high frequency noise for different TFET device design has been discussed in details.

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Section: Impact Of Noise In Tfet Based Circuit and Memory Designmentioning

confidence: 99%

Noise Analysis in Nanostructured Tunnel Field Devices

Chander¹,

Sinha²

2022

21st Century Nanostructured Materials - Physics, Chemistry, Classification, and Emerging Applications in Industry, Biomedicine,

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“…Most researchers employ NMOS transistor(s) for writing. Few have employed transmission gates (TGs) in their design [22, 23] however, in this work, the same WL control signal is used for both TG and power gate transistors. As the result of this, the SRAM cell improves write stability and write delay.…”

Section: Proposed 11t Sram Cellmentioning

confidence: 99%

Single bit‐line 11T SRAM cell for low power and improved stability

Lorenzo

Pailly

2020

IET Computers & Digital Techniques

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This study aims for a new 11T static random access memory (SRAM) cell that uses power gating transistors and transmission gate for low leakage and reliable write operation. The proposed cell has a separate read and write path which successfully improves read and write abilities. Furthermore, it solves the row half select disturbance and utilises a row-based virtual ground signal to eliminate unnecessary bit-line discharge in the un-selected row, thus decreasing energy consumption. The cell also achieves low power due to the stack effect. To show the effectiveness of the cell, its design metrics are compared with other published SRAM cells, namely, conventional 6T, 10T, 9T, and power-gated 9T (PG9T). In standby mode, from 6.71 to 7.37% leakage power reduction is observed for this cell at an operating voltage of 1.2 V and 29.21 to 58.68% & 32.74 to 71.11% improvement for write & read power over other cells. The proposed cell exhibits higher write and reads static noise margins with an improvement of 13.54 and 63.28%, respectively, compared to conventional 6T SRAM cell. The cell provides write delay improvement from 29.77 to 49.40% and read delay improvement from 7 to 12% compared to 9T, 10T, and PG9T, respectively.

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