A Novel Silicon-on-Insulator Super-Junction Lateral-Double-Diffused Metal-Oxide-Semiconductor Transistor with T-Dual Dielectric Buried Layers

Abstract

A novel silicon-on-insulator (SOI) high-voltage device of super-junction (SJ) lateral-double-diffused metal-oxidesemiconductor transistors (LDMOSTs) with T-dual dielectric buried layers (T-DBLs) is presented. The T-DBLs are formed by the first T-shaped dielectric layer and the second dielectric layer. A lot of holes are accumulated on the top interface of the second dielectric layer, which compensates for the charge imbalance of the surface N and P pillars, thus the substrate-assisted depletion (SAD) effect is eliminated in the new device. The electric field of the second dielectric buried layer, 𝐸 I2 , is enhanced by the interface charges, and the breakdown voltage 𝑉 breakdown is increased. 𝐸 I2 = 515 V/𝜇m is obtained in the T-DBL SOI SJ. The 𝑉 breakdown of the new device is increased from 124 V of the conventional SOI SJ to 302 V with a 15 𝜇m length drift region. The specific on-resistance (𝑅on,sp) of the T-DBL SOI SJ is only 0.00865 Ω•cm 2 and the FOM (FOM = 𝑉 2 breakdown /𝑅on,sp) is 10.54 MW/cm 2 .