A novel Sigma–Delta based parallel analogue-to-residue converter

Abstract

An important step in the residue number system (RNS) based signal processing is the conversion of signal into residue domain. Many implementations of this conversion have been proposed for various goals, and one of the implementations is by a direct conversion from an analogue input. A novel approach for analogue-to-residue conversion is proposed in this research using the most popular Sigma-Delta analogue-to-digital converter (SD-ADC). In this approach, the front end is the same as in traditional SD-ADC that uses Sigma-Delta (SD) modulator with appropriate dynamic range, but the filtering is done by a filter implemented using RNS arithmetic. Hence, the natural output of the filter is an RNS representation of the input signal. The resolution, conversion speed, hardware complexity and cost of implementation of the proposed SD based analogue-to-residue converter are compared with the existing analogue-to-residue converters based on Nyquist rate ADCs.Keywords: analogue-to-residue converter; Sigma-Delta modulator; decimation filter; residue number system; performance evaluation IntroductionMost of the real time digital signal processing (DSP) algorithms are based on intensive multiplication and addition operations. In real time systems digital convolution, finite impulse response (FIR) filtering, discrete Fourier transforms (DFT) and similar computations are at high sampling rate on long word lengths. The carry propagating multipliers and adders in binary number systems become the bottle-neck for high sampling rate computations. The use of residue number system (RNS) draws a great deal of interest in such computationally intensive DSP applications as it significantly speeds up multiply and accumulate (MAC) operations (Parhami 2000). Also, for higher orders and large dynamic range, the filters implemented in RNS are significantly smaller than filters implemented in the traditional two's complement number system (TCS). A design space exploration is carried out in Cardarilli, Ret, Nannarelli and Re (2007) to identify the trade offs between filters realised in TCS and RNS in terms of filter order, dynamic range, clock frequency and area. The nonpositional nature of RNS makes it suitable for fault-tolerant architectures. The error detection and correction properties are obtained by introducing few redundant moduli that are relatively prime to the non-redundant moduli. By including 'k' redundant moduli, it is possible to detect k errors and to correct bk/2c errors (Soderstrand,