A novel reference signal generator for active power filters based on Recursive DFT

Борисов, К.; Ginn, Herbert L.

doi:10.1109/apec.2008.4522990

Cited by 14 publications

(11 citation statements)

References 10 publications

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“…From (10), one can conclude that the transformation (6) can be designed in a manner as to eliminate a set of harmonic vector components…”

Section: B the Gdsc Methodsmentioning

confidence: 99%

“…Many algorithms have been proposed for obtaining the fundamental-frequency positivesequence (FFPS), fundamental-frequency negative-sequence (FFNS) and harmonic vector components of three-phase signals. The most known are the synchronous reference frame phase-locked-loop (SRF-PLL) [3], the enhanced PLL [4], the methods based on the principle of delayed signal cancelation (DSC-PLL, enhanced DSC-PLL or EDSC-PLL, and generalized DSC-PLL or GDSC-PLL) [5]- [9], and methods based on Fourier transform [10]- [12]. The GDSC-PLL has shown excellent performance for detecting the FFPS, FFNS, and harmonic vector components in most applications.…”

Section: Introductionmentioning

confidence: 99%

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FPGA Implementation of the Generalized Delayed Signal Cancelation—Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals

Nascimento

Limongi

2013

IEEE Trans. Ind. Electron.

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Fundamental-frequency and harmonic positive-and negative-sequence components detection is an important task for implementing power converters for renewable energy systems, uninterruptible power supplies, active power filters, dynamic voltage restorers, and also for power systems protection relays. Detection techniques of this kind are generally implemented in digital signal processor (DSP) with the execution time limited by the sampling period. The computational effort of the control algorithm can considerably increase the execution time, due to the sequential nature of processing in DSP. A promising technique for sequence components separation of three-phase signals is the so called the generalized delayed signal cancelation-phase locked loop (GDSC-PLL). Field programmable gate array's (FPGA's) capacity of exploring the parallelism of operations present in the GDSC-PLL is demonstrated in this paper through the mapping of this technique directly in hardware, allowing for a much shorter execution time than in DSP. The proposed architecture is presented, and the efficient detection of the fundamental-frequency positive-sequence with FPGA is demonstrated, with the obtained results compared with a traditional DSP implementation. In particular, the advantages and possibilities of the use of FPGA are demonstrated in comparison with the DSP. For this comparison, a metric for evaluating the capacity of complexity increase in application algorithms is proposed.Index Terms-Digital signal processor (DSP), field programmable gate array (FPGA), generalized delayed signal cancelation-phase locked loop (GDSC-PLL), phase detection, three-phase system.

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“…From (10), one can conclude that the transformation (6) can be designed in a manner as to eliminate a set of harmonic vector components…”

Section: B the Gdsc Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

FPGA Implementation of the Generalized Delayed Signal Cancelation—Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals

Nascimento

Limongi

2013

IEEE Trans. Ind. Electron.

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“…Therefore, an efficient computation method known as Recursive Discrete Fourier Transform (RDFT), instead, is proposed in [10] to provide an accurate and efficient calculation of required variables. From the RDFT algorithm, calculation of the CRMS values of the measured voltages and currents will provide a ratio that can be interpreted as time varying quantities.…”

Section: Plant Modelmentioning

confidence: 99%

“…Time domain and frequency domain techniques [9] for reference signal generation both produces the same steady state outputs but differs in the dynamic response and the computational complexity. Among many power theories, CPC theory is one of the solutions along with the use of Recursive Fourier Discrete Transform (RDFT) [10]. PEBB control consists of the current controller, Phase Lock Loop (PLL), Modulator and protection logic, and gate driver circuits to control the switches.…”

Section: System Structurementioning

confidence: 99%

Adaptive limited lookahead controller for minimizing power losses in flexible active compensators

Amgai¹,

Shi²,

Abdelwahed³

et al. 2011

2011 IEEE Electric Ship Technologies Symposium

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A Scalable Limited Lookahead Controller is proposed for coordinating multiple Shunt Switching Compensators (SSCs) to serve flexible compensation objectives while minimizing the power losses. A strategy utilizing Current Physical Component (CPC) theory with Recursive Discrete Fourier Transformation is used to orthogonally decompose the SSC reference currents into active, reactive, unbalanced and harmonic current components. These components then are associated with scaling coefficients which define the percentage of each desired component within the SSC compensated current, and therefore, providing flexibility and controllability for different compensation objectives. The proposed limited lookahead controller uses the system model and the current plant measurements to forecast the future states and then search for the values of the scaling coefficients to minimize the energy loss in SSCs, satisfying all the constraints. This scheme provides fast, accurate, and real time computation of the reference current coefficients, while maintaining a small latency. Our approach is applicable for systems such as shipboard distribution systems that requires flexible energy management with high degree of robustness avoiding single points of failure. MATLAB/Simulink simulation results of a three SSCs system are presented and discussed.

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“…Methods based on fast Fourier transform for three-phase systems were also recently proposed [21]- [23]. In order to allow online harmonics detection, these methods generally use a recursive discrete Fourier transform algorithm.…”

Section: Introductionmentioning

confidence: 99%

A space-vector discrete Fourier transform for detecting harmonic sequence components of three-phase signals

Neves

Souza

Bueno

et al. 2009

2009 35th Annual Conference of IEEE Industrial Electronics

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In this paper, a discrete-time algorithm for separately detecting the positive-and negative-sequence harmonic space-vector components of a three-phase signal is presented. The discrete Fourier transform is applied to the threephase signals represented by the Clarke's ࢻࢼ vector. The proposed transform outputs the instantaneous values of the fundamental frequency and harmonic component vectors of the input three-phase signals. A recursive algorithm for low-effort online implementation is also presented. The detection performance for variable frequency and inter-harmonic input signals is discussed. The proposed method performance is verified through experiments.Index Terms-Discrete Fourier transforms, industrial power system harmonics, amplitude and phase estimation, active filters.

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A novel reference signal generator for active power filters based on Recursive DFT

Cited by 14 publications

References 10 publications

FPGA Implementation of the Generalized Delayed Signal Cancelation—Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals

FPGA Implementation of the Generalized Delayed Signal Cancelation—Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals

Adaptive limited lookahead controller for minimizing power losses in flexible active compensators

A space-vector discrete Fourier transform for detecting harmonic sequence components of three-phase signals

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