A novel photoresist-based film-profile engineering scheme for fabricating double-gated, recess-channel IGZO thin-film transistors

Abstract

We reported an experimental fabrication of double-gated (DG) thin-film transistor (TFT) with IGZO recess-channel using a designer photoresist-based thin-film profile engineering approach. In this approach, an organic shadow mask of photoresist (PR) was formed over a p+-Si wafer that was encapsulated by an oxide layer. The lithographically-patterned PR layer is an effective mask for shadowing reactive species during the subsequent deposition steps of IGZO and Aluminum, enabling the formation of IGZO recess-channel and discrete Al source/drain pads at room-temperature. The top-gate or DG configurations with the Si substrate serving as the bottom-gate were investigated. The fabricated DG TFTs show significant improvements in both ION and IOFF as compared with single-gated TFTs. The proposed process scheme is readily applicable to the back-end-of-line of a chip. This work demonstrates the feasibility of IGZO recess-channel TFTs in various gated configurations, enabling a building block for emerging functional devices for More-than-Moore applications.

Preparation and Properties of Crystalline IGZO Thin Films

“…For their particular properties, transparent-oxide thin films can be used widely in thin film transistors (TFTs) as control units in liquid crystal displays (LCDs), flexible active-matrix organic light-emitting diode (AM-OLED) displays, wearable devices, photoelectric devices, thermoelectric generators and chemical and biological sensors [1][2][3][4][5][6][7]. Among many transparent-oxide thin film semiconductor materials, the indium gallium zinc oxide (IGZO) membrane is considered the most promising active layer substitution for the traditional hydrogenated amorphous silicon (a-Si)-based TFT and the low temperature poly-silicon (LTPS)-based TFT used in the backplanes of LCD and AM-OLED displays.…”

A low-temperature photoresist-based film-profile engineering scheme for fabricating bottom- and double-gated indium–gallium–zinc oxide TFTs

“…1(d)], IGZO channel, and Ti/Al for S/D were sequentially deposited with specifically designed film profiles by taking advantage of the PFI-38 suspended bridge as a shadow mask. 20) The IGZO layer with a nominal thickness of 32 nm was deposited at RT using a RF sputtering system with a mixture of Ar/O 2 at an operating pressure of 5 mtorr [Fig. 1(e)].…”

“…The higher k values of these gatedielectric layers allow to achieve the desired gate capacitances and reasonable gate leakage simultaneously since their large physical thicknesses are able to suppress the tunneling rate. [11][12][13][14][15][16][17][18][19] We have reported a novel scheme 20) stemming from a onemask film-profile engineering (FPE) technique 21,22) for the fabrication of OS-TFTs with the bottom-gated (BG) configuration. In this proposed FPE approach, a suspended inorganic (e.g.…”

“…By adjusting the operating pressures and thus, tuning the mean-free path of reactive species during the subsequent deposition processes, we have demonstrated great feasibility of controlling the deposition rate and tailoring the film profile. Thereby, we further advanced the FPE approach 20) using an organic (photoresist, PR) suspended bridge for the fabrication of double-gated (DG) TFTs since it is easy to remove the PR suspended bridge right following the formation of BG TFT structures. In Ref.…”

“…The remaining PR residues on the bottom gate-oxide layer as a consequence of an un-optimized process flow lead to the fabricated OS-TFTs showing low field-effect mobility of 0.1 cm 2 V −1 s −1 and SS larger than 500 mV/dec. 20) To cope with the PR residue issues, we advanced the low-temperature deposition of an Al 2 O 3 at 110 °C by using atomic-layer deposition (ALD) as the bottom gate-oxide layer, 23) allowing the formation of the organic PR bridge prior to the gate-oxide layer deposition. Based on this low-temperature PR-based FPE fabrication process, we have also successfully fabricated and demonstrated DG TFTs with high performance.…”