A novel floating point comparator using parallel tree structure

Abstract

In recent years, floating point numbers are widely adopted due to its good robustness against quantization errors and high dynamic range capabilities. In this paper, a novel single-precision floating point comparator design is proposed. A parallel prefix tree structure is literally the back bone of this comparator design. This is designed using Verilog code, simulated and synthesised using CADENCE ENCOUNTER tool with TSMC 180nm technology. The proposed comparator fully supports single precision floating-point comparisons, as defined in the IEEE 754 standard. The proposed floating point comparator design exploits the advantages of structural reusability. Cadence Encounter synthesis for a 32-b floating point comparator shows a worst case input-output delay of 3.014 ns and a total power dissipation of 91.8µW using 0.18-μm TSMC technology. The replacement of NOR-NAND gate using OR gate in the decision module incurs the improvement in the performance which thereby outperforms the existing design.Keywords-Floating point number, parallel prefix tree, IEEE 754 format.

Reduced Complexity of a Successive Cancellation Based Decoder for NB-Polar Codes

“…Based on results presented in [13], a simple precision addition requires an area of 38560 µm 2 and consumes 2.15 mW, and a multiplication occupies an area of 44953 µm 2 and consumes 6.957 mW. In [14], a comparator has an area of 2771 µm 2 and consumes 84.52 µW. Considering the field F 2 6 and assuming that all operations are carried out in parallel, the kernel node (a VN + a CN) of the SC-MS reduces the area by 50.66% (from 353.09 mm 2 to 174.22 mm 2 ), also one can see a power consumption saving of 75.68% (from 38.771 W to 9.428 W).…”

“…The message û = (û n 0 , ..., ûn N −1 ) can be estimated using (17), (18), (19), and (9). The hard decision u n i is obtained using (14), where L n i is replaced by I n i for i = 0, ..., N − 1. The operators used in the quantized SC-MS decoder require Q m + 1 bits of precision.…”