A Novel Dual-Doping Floating-Gate (DDFG) Flash Memory Featuring Low Power and High Reliability Application

Li, Yan; Huang, Ru; Cai, Yimao; Zhou, Falong; Shan, Xiaonan; Zhang, Xing; Wang, Yangyuan

doi:10.1109/led.2007.897888

Cited by 8 publications

(3 citation statements)

References 11 publications

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“…The present edge contact strategy based on in-situ phase transition transforms 2H-MoS 2 under metal contact into its metallic 1 T phase, as an interfacial layer, it avoids undesired roughness at contact interface. With an endurance lifetime >10 6 cycles, the edge-contacted memory cell meets the requirement of the prevailing silicon flash memory (~10 5 cycles for SLC) 41 – 44 , while having 2–4 orders’ faster P/E speed (Supplementary Note 19 ).…”

Section: Resultsmentioning

confidence: 99%

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

Yu,

Wang,

Zhuge

et al. 2023

Nat Commun

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As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the ‘speed-retention-endurance’ dilemma, their typical speed is limited to ~microseconds to milliseconds for program and erase operations, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10–100 ns) and robust (endurance>106 cycles, retention>10 years) memory operation can be simultaneously achieved in a two-dimensional van der Waals heterostructure flash memory with 2H-MoS2 as semiconductor channel. We attribute the superior performance to the gate tunable Schottky barrier at the edge contact, which can facilitate hot carrier injection to the semiconductor channel and subsequent tunneling when compared to a conventional top contact with high density of defects at the metal interface. Our results suggest that contact engineering can become a strategy to further improve the performance of 2D flash memory devices and meet the increasing demands of high speed and reliable data storage.

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Section: Resultsmentioning

confidence: 99%

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

Yu,

Wang,

Zhuge

et al. 2023

Nat Commun

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“…Comparatively, top contacted memory cells working at same operation voltage requires longer pulse duration to reach the same on/off ratio, and results in typical endurance lifetime ~10 4 cycles (See Supplementary Information S16). It is worth noting that the attained endurance lifetime achieved in edge contacted memory cells meet the requirement of the prevailing silicon flash memory (~10 5 cycles for SLC), [41][42][43][44] while having 2-4 orders' faster P/E speed (Extended data Figure 1, Supplementary Information Table S1). We further note that the memory after 10 5 endurance cycles still keeps long data retention over years (Extended data Figure 2 and Supplementary information S17), 45 demonstrating the robust durability of present flash memory cell.…”

Section: Robust Endurance Of Edge Contacted Flash Memorymentioning

confidence: 92%

Simultaneously Ultrafast and Super-Robust Two-dimensional Flash Memory Enabled by Phase Engineered Edge Contact

Zhai

Wang

et al. 2023

Preprint

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As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the dilemma of ‘speed-retention-endurance’, their typical operation speed is limited ~microseconds to milliseconds for program and erase, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10-100 ns) and super-robust (endurance>106 cycles, retention>10 years) memory operation can be simultaneously guaranteed in two-dimensional van der Waals heterostructure flash memory with 2H-MoS2 as semiconductor channel. The superior performance stems from the highly gate tunable Schottky barrier at the edge contact, which facilitates hot carrier injection to semiconductor channel and subsequent tunneling if compared to conventional top contact that has rich defects under metal. Our results show the promise of inventing 2D flash memory via contact engineering to further advance the prevailing flash memory technology to meet for the increasing demand of high speed and reliable data storage.

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“…This requirement may cause a high leakage current, a high power consumption and unexpected drain disturbance. 5) The drain voltage cannot be scaled down below 3.2 V for CHE injections, and therefore, the channel length is also limited by the punch-through effect. 6) Secondly, as for as the two separate physical charge packets are considered, it is difficult to avoid the interference between the two bits associated each other, with conventional CHE injections, in nanoscale NROM devices.…”

Section: Introductionmentioning

confidence: 99%

Substrate-Bias Assisted Hot Electron Injection Method for High-Speed, Low-Voltage, and Multi-Bit Flash Memories

Kim

Zhang

et al. 2011

Jpn. J. Appl. Phys.

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The authors present a highly efficient program method for high-speed, low-voltage, and multi-bit/cell operation in the conventional silicon/oxide/nitride/oxide/silicon structure. This method uses a forward bias for collecting the electrons into the substrate whilst both substrate and drain biases are used for injecting the electrons into the nitride layer. With an aid of the substrate bias for electron injection, we obtained a program time as short as 600 ns and an ultralow-voltage operation with a drain voltage of 2 V and a substrate voltage of -3 V. In addition, a localized charge-injection near the junction edge was confirmed with a threshold voltage difference of 1 V between the forward and reverse read.

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A Novel Dual-Doping Floating-Gate (DDFG) Flash Memory Featuring Low Power and High Reliability Application

Cited by 8 publications

References 11 publications

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

Simultaneously Ultrafast and Super-Robust Two-dimensional Flash Memory Enabled by Phase Engineered Edge Contact

Substrate-Bias Assisted Hot Electron Injection Method for High-Speed, Low-Voltage, and Multi-Bit Flash Memories

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