A novel dimension-reduction technique for the capacitance extraction of 3-D VLSI interconnects

Wang, Hong; Sun, Weikai; Zhu, Zhenya; Ji, Hao; Song, Ben; Dai, Wayne Wei-Ming

doi:10.1109/22.704944

Cited by 39 publications

(2 citation statements)

References 8 publications

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“…The VLSI structure had fine geometric details in all dimensions (Figure 8). Thus, a micron-scale mesh size must be employed for the accuracy simulation [32]. The VLSI interconnect model had dimensions of 400 × 240 × 244.64 nm in each direction.…”

Section: Wave Propagation Problem-very Large Scale Integration (Vlsi)...mentioning

confidence: 99%

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A One-Step Leapfrog ADI Procedure with Improved Absorption for Fine Geometric Details

Han²,

Xie

et al. 2021

Electronics

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Based on the alternating direction implicit (ADI) procedure, leapfrog formulation, and a higher order PML scheme, we propose an unconditionally stable perfectly matched layer (PML) algorithm with improved absorption to treat open regions in a finite computational domain with improved overall performance. The proposed algorithm performed well compared to other algorithms during simulations. We further demonstrated the proposed scheme’s effectiveness using numerical examples. We found that the proposed scheme had enhanced effectiveness and improved the absorption during the whole simulation. Furthermore, it was able to break the stability condition, proving that it is an unconditionally stable scheme.

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Section: Wave Propagation Problem-very Large Scale Integration (Vlsi)...mentioning

confidence: 99%

“…This cannot be realized when employing conventional algorithms. The introduction of unconditionally stable algorithms can be regarded as an effective way to overcome this obstacle [32].…”

Section: Wave Propagation Problem-very Large Scale Integration (Vlsi)...mentioning

confidence: 99%

A One-Step Leapfrog ADI Procedure with Improved Absorption for Fine Geometric Details

Han²,

Xie

et al. 2021

Electronics

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Capacitance Extraction

Yu¹,

Wang²

2005

Encyclopedia of RF and Microwave Engineering

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With the advances in integrated circuit (IC) technology, the effects of electromagnetic coupling among the metal interconnect lines have greatly influenced circuit performance in both VLSI circuits and microwave ICs. Therefore, the modeling and accurate extraction of interconnect capacitance has become a subject of advanced research in these fields. In this article, the fundamental theory, contemporary methodology, and algorithms of capacitance extraction are presented. First, the electrostatic basis of the capacitor is introduced and the capacitance for a multiconductor system is defined. Then, the practical methodologies of capacitance extraction for VLSI interconnects are presented, ranging from 1D, 2D, 2.5D to 3D methods and including the technique used for the task of current full‐chip extraction. Various numerical techniques of 3D capacitance extraction are discussed, some of which represent the frontier of this research field. For 3D capacitance extraction, the state of the art in fast boundary‐element methods and semianalytical approaches are surveyed, with a fairly complete list of references. Finally, some future tends on capacitance extraction are discussed.

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One‐Step Leapfrog Locally 1D Theory with Higher‐Order Enhanced Absorption for Fine‐Details Simulation

Chen

Xie

et al. 2022

Advcd Theory and Sims

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Based on a higher‐order concept and one‐step leapfrog formulation, an unconditionally stable leapfrog locally 1D (LOD) perfectly matched layer (PML) is proposed to not only enhance the absorbing performance in terminating an unbounded finite‐difference time‐domain (FDTD) algorithm but also improve the computational efficiency compared with the LOD‐FDTD algorithm. Most precisely, the PML is implemented by the auxiliary differential equations method. By applying the proposed scheme to a 3D electromagnetics simulation, the proposal can utilize the unconditionally stable algorithm, one‐step leapfrog formulation, and higher‐order concept in terms of attenuating low‐frequency propagation waves, enhancing the performance, and improving the computational efficiency. Numerical examples including the magic‐T waveguide model, very large‐scale integration circuits, and the structure of metamaterials are investigated to further demonstrate the efficiency, performance, and unconditional stability. The results help conclude that the proposed scheme can attain better performance and efficiency when the time step far surpasses the Courant–Friedrichs–Lewy limit. Most importantly, by employing the one‐step leapfrog formulation in the LOD algorithm, the memory requirements and simulation duration can be reduced significantly, indicating the improvement of the algorithm compared with the published LOD schemes.

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A novel dimension-reduction technique for the capacitance extraction of 3-D VLSI interconnects

Cited by 39 publications

References 8 publications

A One-Step Leapfrog ADI Procedure with Improved Absorption for Fine Geometric Details

A One-Step Leapfrog ADI Procedure with Improved Absorption for Fine Geometric Details

Capacitance Extraction

One‐Step Leapfrog Locally 1D Theory with Higher‐Order Enhanced Absorption for Fine‐Details Simulation

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