A novel design methodology to optimize the speed and power of the CNTFET circuits

Kim, Young Bok; Kim, Yong-Bin; Lombardi, Fabrizio

doi:10.1109/mwscas.2009.5235967

Cited by 69 publications

(56 citation statements)

References 9 publications

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“…The distance between the centers of two adjacent CNTs below the same gate of a CNTFET is called Pitch, which has a direct impact on the width of the contacts and the gate of the transistor. The width of the gate of a CNTFET can be calculated based on the following equation [8]:…”

Section: Carbon Nanotube Field Effect Transistors (Cnfets)mentioning

confidence: 99%

A Novel Quaternary Full Adder Cell Based on Nanotechnology

Sharifi

Moaiyeri²,

Navi³

2015

IJMECS

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Abstract-Binary logic circuits are limited by the requirement of interconnections. A feasible solution is to transmit more information over a signal line and utilizing multiple-valued logic (MVL). This paper presents a novel high performance quaternary full adder cell based on carbon nanotube field effect transistor (CNTFET). The proposed Quaternary full adder is designed in multiple valued voltage mode. CNTFET is a promising candidate for replacing MOSFET with some useful properties, such as the capability of having the desired threshold voltage by regulating the diameters of the nanotubes, which make them very appropriate for voltage mode multiple threshold circuits design. The proposed circuit is examined, using Synopsys HSPICE with the standard 32 nm CNTFET technology with different temperatures and supply voltages.

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Section: Carbon Nanotube Field Effect Transistors (Cnfets)mentioning

confidence: 99%

A Novel Quaternary Full Adder Cell Based on Nanotechnology

Sharifi

Moaiyeri²,

Navi³

2015

IJMECS

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“…The dielectric layer under the gate is deposited on the undoped CNTs (in the middle), and the metal gate layer covers it [18]. Single-wall CNT partitions between the gate and the drain and source are heavily doped to provide low resistors in a serial state whenever the transistor is in its active mode, as shown in Fig. 1 [18], [32]. The CNTFETs switch between active mode and inactive mode by manipulating the electrical potential of the gate.…”

Section: Cntfet Reviewmentioning

confidence: 99%

“…The CNTFETs switch between active mode and inactive mode by manipulating the electrical potential of the gate. In reports on CNTFET fabrication, it was declared that a near-ballistic [23] or even ballistic transportation can be gained from an intrinsic CNT under low voltage with an approximately 1 micrometer mean free path needed for elastic scattering to obtain efficient improvement in performance [32]- [34]. The fabrication of single-wall CNT (SWCNT) transistors was reported in [18], [35].…”

Section: Cntfet Reviewmentioning

confidence: 99%

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Zarhoun

Moaiyeri

Farahani

et al. 2014

ETRI J

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The integration of digital circuits has a tight relation with the scaling down of silicon technology. The continuous scaling down of the feature size of CMOS devices enters the nanoscale, which results in such destructive effects as short channel effects. Consequently, efforts to replace silicon technology with efficient substitutes have been made. The carbon nanotube fieldeffect transistor (CNTFET) is one of the most promising replacements for this purpose because of its essential characteristics. Various digital CNTFET-based circuits, such as standard logic cells, have been designed and the results demonstrate improvements in the delay and energy consumption of these circuits. In this paper, a new CNTFET-based 5-input XOR gate based on a novel design method is proposed and simulated using the HSPICE tool based on the compact SPICE model for the CNTFET at the 32-nm technology node. The proposed method leads to improvements in performance and device count compared to the conventional CMOS-style design.Keywords: Nanotechnology, carbon nanotube fieldeffect transistor, CNTFET, high-performance circuits, CNTFET-based inverter, exclusive-OR gate, XOR gate. Manuscript received Jan. 13, 2013; revised Apr. 2, 2013; accepted Apr. 5, 2013. Ronak Zarhoun (phone: +98 2129904195, r.zarhoon@mail.sbu.ac.ir), Mohammad H. Moaiyeri (h_moaiyeri@sbu.ac.ir), and Samira S. Farahani (sa.shirinabadi@mail.sbu.ac.ir) are with the Nanotechnology and Quantum Computing Laboratory, Shahid Beheshti University, G.C., Tehran, Iran.Keivan Navi (corresponding author, navi@sbu.ac.ir, knavi@uci.edu) is with the Quantum Computing Laboratory, Shahid Beheshti University, G.C., Tehran, Iran, and is also with the Department of Electrical Engineering and Computer Science, University of California, Irvine, Irvine, CA, USA. I. IntroductionNo one can imagine today's world without the influence and power of computer technology, which dominates many aspects of people's lives, from such simple details as cell phones to such important and critical projects as those in aeronautics. All computer-based technological improvements are possible through computational functions, which are made up of precise logic gates. Such logic gates as NOT, NAND, NOR, and XOR are the main building blocks of logical functions [1], [2]. Considering these gates, the XOR gate plays a significant role in computational processors with low-power purposes and arithmetic circuits [3], [4], such as full adder cells [5], [6]-[8], parity bit generators and parity checkers [9], multipliers such as the polynomial basis multiplier [10], and comparator circuits [8], [11], [12]. High-speed XOR gates are needed for summation of partial products in multiplier circuits, and they are also used in MUX modules in arithmetic circuits [12].The most famous application of the XOR gate is in coding processes and data encryption or decryption, especially in AES (Advanced Encryption Standard) [1], which is sufficiently used in data communication. In design testing, it is used in built-in self-test structures [...

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“…Second, it is also possible to reutilize CMOS fabrication process. The last but not the least is that CNFET has the best experimentally demonstrated device current carrying ability up to now [14].…”

Section: A Technology Constraintsmentioning

confidence: 99%

Performance Comparison of High-Speed High-Order (n:2) and (n:3) CNFET-Based Compressors

Mehrabi¹,

Navi²,

Hashemipour³

2013

IJMO

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Abstract-Compressors, as one of the Processing Elements (PEs), are the fundamental building blocks for accumulating partial products during the multiplication process. In this paper various high speed high-order compressors such as 6:2 and 7:2 compressors are compared with 6:3 and 7:3 ones in terms of designs and hardware requirements. To evaluate their performance, they are analyzed and compared with respect to delay and Power-Delay Product (PDP). The comparison is accomplished using the recent implementation of Full-Adder cell design at transistor-level in Carbon Nanotube Field Effect Transistor (CNFET) technology. Simulations are carried out using Synopsys HSPICE with 32nm CNTFET technology and 0.65 supply voltage. The results of simulations demonstrate the superiority of the n:3structures in terms ofpropagation delay and powerconsumption around %41 and%8, respectively.

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A novel design methodology to optimize the speed and power of the CNTFET circuits

Cited by 69 publications

References 9 publications

A Novel Quaternary Full Adder Cell Based on Nanotechnology

A Novel Quaternary Full Adder Cell Based on Nanotechnology

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Performance Comparison of High-Speed High-Order (n:2) and (n:3) CNFET-Based Compressors

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