A novel CNTFET-based ternary logic gate design

Lin, Sheng; Kim, Yong-Bin; Lombardi, Fabrizio

doi:10.1109/mwscas.2009.5236063

Cited by 125 publications

(72 citation statements)

References 11 publications

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“…CNTFET can operate five times faster than CMOS in the best case without any extra power overhead [26]. Another essential characteristic of CNTFET is its flexible behavior in manipulating the threshold voltage (V th ) by adopting a proper diameter for CNTs [17]. There are three types of CNTFET: The first type is the MOSFET-like CNTFET (includes the p-type CNTFET [P-CNTFET] and n-type CNTFET [N-CNTFET]), which operates in a unipolar fashion; The second type is the Schottky barrier (SB) CNTFET, which demonstrates ambipolar characteristics [31] but is not proper for ultra high-performance applications because of the SB element; The third type of CNTFET, suitable for ultra lowpower applications, is the band-to-band tunneling CNTFET and has significantly low current in its active mode [23].…”

Section: Cntfet Reviewmentioning

confidence: 99%

“…The scaling down of technology has closely reflected Moore's law. As the length of physical gates reaches the nanoscale, different destructive effects, such as short channel effects, affect the current-voltage characteristics of the MOSFET family, which limits the miniaturization of the feature size of this family [2], [17], [18]. Another negative effect of miniaturization is the exponential increase of leakage current involving subthreshold voltage caused by scaling down the supply voltage and threshold voltage [19].…”

Section: Introductionmentioning

confidence: 99%

“…Among these alternative technologies, the CNTFET is the most encouraging substitution for the conventional MOSFET family due to its similarities to MOSFET in terms of electrical properties and manufacturing process [26]. Up to now, many circuits have been successfully designed based on CNTFET technology, such as binary and ternary full adder cells, SRAM storage cells, multiple-valued logic circuits, and min-max circuits [27], [17]- [19], [21]- [24], [28]. The CNTFET can also be applied in polylactic acid structures [29].…”

Section: Introductionmentioning

confidence: 99%

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An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Zarhoun

Moaiyeri

Farahani

et al. 2014

ETRI J

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The integration of digital circuits has a tight relation with the scaling down of silicon technology. The continuous scaling down of the feature size of CMOS devices enters the nanoscale, which results in such destructive effects as short channel effects. Consequently, efforts to replace silicon technology with efficient substitutes have been made. The carbon nanotube fieldeffect transistor (CNTFET) is one of the most promising replacements for this purpose because of its essential characteristics. Various digital CNTFET-based circuits, such as standard logic cells, have been designed and the results demonstrate improvements in the delay and energy consumption of these circuits. In this paper, a new CNTFET-based 5-input XOR gate based on a novel design method is proposed and simulated using the HSPICE tool based on the compact SPICE model for the CNTFET at the 32-nm technology node. The proposed method leads to improvements in performance and device count compared to the conventional CMOS-style design.Keywords: Nanotechnology, carbon nanotube fieldeffect transistor, CNTFET, high-performance circuits, CNTFET-based inverter, exclusive-OR gate, XOR gate. Manuscript received Jan. 13, 2013; revised Apr. 2, 2013; accepted Apr. 5, 2013. Ronak Zarhoun (phone: +98 2129904195, r.zarhoon@mail.sbu.ac.ir), Mohammad H. Moaiyeri (h_moaiyeri@sbu.ac.ir), and Samira S. Farahani (sa.shirinabadi@mail.sbu.ac.ir) are with the Nanotechnology and Quantum Computing Laboratory, Shahid Beheshti University, G.C., Tehran, Iran.Keivan Navi (corresponding author, navi@sbu.ac.ir, knavi@uci.edu) is with the Quantum Computing Laboratory, Shahid Beheshti University, G.C., Tehran, Iran, and is also with the Department of Electrical Engineering and Computer Science, University of California, Irvine, Irvine, CA, USA. I. IntroductionNo one can imagine today's world without the influence and power of computer technology, which dominates many aspects of people's lives, from such simple details as cell phones to such important and critical projects as those in aeronautics. All computer-based technological improvements are possible through computational functions, which are made up of precise logic gates. Such logic gates as NOT, NAND, NOR, and XOR are the main building blocks of logical functions [1], [2]. Considering these gates, the XOR gate plays a significant role in computational processors with low-power purposes and arithmetic circuits [3], [4], such as full adder cells [5], [6]-[8], parity bit generators and parity checkers [9], multipliers such as the polynomial basis multiplier [10], and comparator circuits [8], [11], [12]. High-speed XOR gates are needed for summation of partial products in multiplier circuits, and they are also used in MUX modules in arithmetic circuits [12].The most famous application of the XOR gate is in coding processes and data encryption or decryption, especially in AES (Advanced Encryption Standard) [1], which is sufficiently used in data communication. In design testing, it is used in built-in self-test structures [...

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Section: Cntfet Reviewmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Zarhoun

Moaiyeri

Farahani

et al. 2014

ETRI J

View full text Add to dashboard Cite

show abstract

“…Because of their miniaturized dimensions, they are implemented as a reliable switch with much less power than a silicon-based device to response of increasing sensitivity to voltage scaling variations in today's VLSI circuit designs. The unique feature which makes difference CNTFETs form MOSFETs is the threshold voltage which can be controlled by changing the chirality vector or the diameter of the CNTs [16]. This feature makes easier the design process of the VLSI circuits.…”

Section: A Technology Constraintsmentioning

confidence: 99%

Performance Comparison of High-Speed High-Order (n:2) and (n:3) CNFET-Based Compressors

Mehrabi¹,

Navi²,

Hashemipour³

2013

IJMO

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Abstract-Compressors, as one of the Processing Elements (PEs), are the fundamental building blocks for accumulating partial products during the multiplication process. In this paper various high speed high-order compressors such as 6:2 and 7:2 compressors are compared with 6:3 and 7:3 ones in terms of designs and hardware requirements. To evaluate their performance, they are analyzed and compared with respect to delay and Power-Delay Product (PDP). The comparison is accomplished using the recent implementation of Full-Adder cell design at transistor-level in Carbon Nanotube Field Effect Transistor (CNFET) technology. Simulations are carried out using Synopsys HSPICE with 32nm CNTFET technology and 0.65 supply voltage. The results of simulations demonstrate the superiority of the n:3structures in terms ofpropagation delay and powerconsumption around %41 and%8, respectively.

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“…To follow the Moore's law that states the number of transistors on integrated circuits (ICs) doubles almost every two years [2], the feature size of conventional silicon based MOSFETs must be scale down. CMOS technology has faced serious problems by scaling down of the feature size into the nanoranges, such as increase of current leakage, high power densities, decreased gate control, short-channel effects and high sensitivity to process variations [3].…”

Section: Introductionmentioning

confidence: 99%

A Novel Systolic Array Architecture for Matrix Multiplication Circuit Design using Carbon Nanotube Technology

Azimian¹,

Dehkordi²,

Tehrani³

2017

IJCA

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ABSTRACTrecently, parallel computing has been considered increasingly and many researchers have focused on this topic in order to enhance their designs, especially speed parameter to reach lower delay in computational operations. Among the methods which use parallel computing, systolic arrays have attracted researcher's attention because of its unique characteristics. Systolic arrays are arrays of processors which are connected to a small number of nearest neighbors in a mesh-like topology. Processors perform a sequence of operations on data that flows between them. Generally the operations will be the same in each processor, with each processor performing an operation (or small number of operations) on a data item and them passing it on to its neighbor. Systolic arrays are often using for specific operations, such as "multiply and accumulate", to perform massively parallel integration, convolution, correlation, matrix multiplication or data sorting tasks. On the other hand, silicon limitations for transistors fabrication in future causes a need to substitute this technology by an appropriate ones that among them carbon nanotube (CNT) technology has the most probability. In this paper we conducted a survey on using systolic array in multiply and accumulate operations by a VLSI circuit based on CNT technology.

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A novel CNTFET-based ternary logic gate design

Cited by 125 publications

References 11 publications

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Performance Comparison of High-Speed High-Order (n:2) and (n:3) CNFET-Based Compressors

A Novel Systolic Array Architecture for Matrix Multiplication Circuit Design using Carbon Nanotube Technology

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