A novel CBRAM integration using subtractive dry-etching process of Cu enabling high-performance memory scaling down to 10nm node

Redolfi, A.; Goux, L.; Jossart, N.; Yamashita, Fumiko; Nishimura, Eiichi; Urayama, D.; Fujimoto, Kiyoshige; Witters, T.; Lazzarino, F.; Jurczak, M.

doi:10.1109/vlsit.2015.7223718

Cited by 11 publications

(12 citation statements)

References 2 publications

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“…Ref. also reports excellent reliability of these devices, in particular long Write endurance lifetime above 10 6 cycles using 1 μs‐long pulses, as well as good retention after baking at 150 °C for several days.…”

Section: Cbram Devicesmentioning

confidence: 80%

“…We demonstrated excellent yield of the switching all over the wafer for the smallest 30 nm‐size devices, not only for 30 nm‐thick Cu (Cu30) but also for 5 nm‐thick Cu electrodes (Cu5) . Figure shows the device‐to‐device (D2D) combined with C2C distributions of the states obtained from DC operation.…”

Section: Cbram Devicesmentioning

confidence: 96%

“…It was used for example to pattern <10 nm‐sized OxRRAM devices recently . Although the dry‐etch of Cu layers is very challenging due to the absence of volatile etch bi‐products, we recently developed dry‐etch solutions leading to the demonstration of functional 30 nm‐size TiN\Al 2 O 3 \Ta\Cu CBRAM crossbar devices integrated by subtractive dry‐etch of Cu lines followed by standard passivation module .…”

Section: Cbram Devicesmentioning

confidence: 99%

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Electrochemical processes and device improvement in conductive bridge RAM cells

Goux

Valov

2015

Physica Status Solidi (a)

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In this paper, we discuss the recent progress on the fundamental understandings of ECM/CBRAM cells but also on the improved device structures and reliability for high‐density applications. The influences of the local chemical environment and the material selection/combination are highlighted, and the filament dynamics is described in a general framework that relates all the reported switching modes. Furthermore we also detail some correlation evidences between the filament shape and device electrical characteristics. Finally, we discuss technological challenges related to current‐scaling and cell size‐scaling. Large switching variability associated to low current needs to be mitigated by appropriate Write‐verify methods, while cell scaling requires novel processing techniques such as Cu dry‐etch.

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Section: Cbram Devicesmentioning

confidence: 80%

Section: Cbram Devicesmentioning

confidence: 96%

Section: Cbram Devicesmentioning

confidence: 99%

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Electrochemical processes and device improvement in conductive bridge RAM cells

Goux

Valov

2015

Physica Status Solidi (a)

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“…As mentioned above, in order to satisfy the exponentially grown needs for big-data storage, the integration density of storage system is continuously enlarging while the size of storage cell is continuously scaling. Although a high-density 16 Gb RRAM with 27 nm Technology has been recently reported 30 , the further shrinking of 2D RRAM size, especially in sub-10 nm era, strongly relies on complex processes and advanced lithography technology, facing the cost and fabrication challenges 31 , which hinders RRAM as replacement of NAND flash memory for low-cost mass storage. Therefore, several 3D RRAM structures have been presented aiming to competing with 3D NAND technology in the future 32 33 34 .…”

mentioning

confidence: 99%

Novel Vertical 3D Structure of TaOx-based RRAM with Self-localized Switching Region by Sidewall Electrode Oxidation

Cai

Wang

et al. 2016

Sci Rep

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A novel vertical 3D RRAM structure with greatly improved reliability behavior is proposed and experimentally demonstrated through basically compatible process featuring self-localized switching region by sidewall electrode oxidation. Compared with the conventional structure, due to the effective confinement of the switching region, the newly-proposed structure shows about two orders higher endurance (>108 without verification operation) and better retention (>180h@150 °C), as well as high uniformity. Corresponding model is put forward, on the base of which thorough theoretical analysis and calculations are conducted as well, demonstrating that, resulting from the physically-isolated switching from neighboring cells, the proposed structure exhibits dramatically improved reliability due to effective suppression of thermal effects and oxygen vacancies diffusion interference, indicating that this novel structure is very promising for future high density 3D RRAM application.

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“…Conductive‐bridge random access memory (CBRAM) devices have shown considerable promise as next‐generation nonvolatile memory devices owing to their simple structure, scalability, and large memory window. [ 1–3 ] For a high‐density memory array, a selector device is required to resolve the sneak path current from nonselected cells, which is important for disturbance problems during read or write operations. [ 4 ] Hence, several types of selector devices, such as ovonic threshold switch devices, tunnel barrier selectors, insulator‐to‐metal transition devices, and programmable metallization cell‐type threshold switching devices, have been investigated owing to their promising electrical switching characteristics.…”

Section: Introductionmentioning

confidence: 99%

Hybrid Memory Device (Memory/Selector) with Scalable and Simple Structure for XNOR‐Based Neural Network Applications

Sung

Kim

Kwak

et al. 2021

Adv Elect Materials

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This study investigates the electrical behavior of a hybrid memory device with both memory and selector characteristics. Electrical measurements and simulations indicate that the electrical behaviors (nonvolatile characteristics in Al2O3 layers and volatile characteristics in TiO2 layers) are linked to the stability of the conductive filament (CF) used. The binding energy between the Ag atoms in the CF is crucial for achieving nonvolatile or volatile characteristics. Thus, the hybrid memory device exhibits tunable threshold‐voltage characteristics and a consistent off‐state without requiring an additional selector device. Furthermore, the buffer metal layer between the active electrode and oxide layer affects the filament‐formation process in terms of the switching time. Experimental results show that the buffer layer significantly affects ion motion, such as redox reactions and ion migration. Thus, hybrid memory devices with a Zr buffer layer can solve the voltage–time dilemma, enabling fast and low‐voltage switching. Robust XNOR‐based neural network applications are developed using hybrid memory devices in a cross‐point array with characteristics such as scalability, simple structure, and excellent switching characteristics. By carefully considering the on–off ratio and device variability, hybrid memory devices can ensure reliable operation with a high pattern recognition accuracy in XNOR‐based neural neuromorphic hardware systems.

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A novel CBRAM integration using subtractive dry-etching process of Cu enabling high-performance memory scaling down to 10nm node

Cited by 11 publications

References 2 publications

Electrochemical processes and device improvement in conductive bridge RAM cells

Electrochemical processes and device improvement in conductive bridge RAM cells

Novel Vertical 3D Structure of TaOx-based RRAM with Self-localized Switching Region by Sidewall Electrode Oxidation

Hybrid Memory Device (Memory/Selector) with Scalable and Simple Structure for XNOR‐Based Neural Network Applications

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