A novel bipolar imaging device with self-noise-reduction capability

Tanaka, N.; Ohmi, Tadahiro; Nakamura, Yoshio

doi:10.1109/16.21174

Cited by 36 publications

(6 citation statements)

References 7 publications

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“…It was formerly utilized in bipolar imaging devices [6][7] . Floating capacitor load readout operation does not use column current source and utilizes parasitic capacitor of pixel output vertical signal line (C V ) as column sample/hold capacitor.…”

Section: Floating Capacitor Load Readout Operationmentioning

confidence: 99%

Analysis of pixel gain and linearity of CMOS image sensor using floating capacitor load readout operation

et al. 2015

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In this paper, we demonstrate that the floating capacitor load readout operation has higher readout gain and wider linearity range than conventional pixel readout operation, and report the reason. The pixel signal readout gain is determined by the transconductance, the backgate transconductance and the output resistance of the in-pixel driver transistor and the load resistance. In floating capacitor load readout operation, since there is no current source and the load is the sample/hold capacitor only, the load resistance approaches infinity. Therefore readout gain is larger than that of conventional readout operation. And in floating capacitor load readout operation, there is no current source and the amount of voltage drop is smaller than that of conventional readout operation. Therefore the linearity range is enlarged for both high and low voltage limits in comparison to the conventional readout operation. The effect of linearity range enlargement becomes more advantageous when decreasing the power supply voltage for the lower power consumption. To confirm these effects, we fabricated a prototype chip using 0.18um 1-Poly 3-Metal CMOS process technology with pinned PD. As a result, we confirmed that floating capacitor load readout operation increases both readout gain and linearity range.

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Section: Floating Capacitor Load Readout Operationmentioning

confidence: 99%

Analysis of pixel gain and linearity of CMOS image sensor using floating capacitor load readout operation

et al. 2015

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“…The photodetector used in the image sensors is a pinned photodiodes, silicon-on-insulator (SOI) photodetectors, a bipolar junction transistor (BJT) photodetectors, and a hole accumulation diodes (HADs) [16][17][18][19][20]. We propose a CMOS binary image sensor using a GBT MOSFET-type photodetector.…”

Section: Introductionmentioning

confidence: 99%

High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

Choi

Bae

et al. 2015

SPIE Proceedings

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In this paper, a complementary metal oxide semiconductor (CMOS) binary image sensor based on a gate/body-tied (GBT) MOSFET-type photodetector is proposed. The proposed CMOS binary image sensor was simulated and measured using a standard CMOS 0.18-μm process. The GBT MOSFET-type photodetector is composed of a floating gate (n+-polysilicon) tied to the body (n-well) of the p-type MOSFET. The size of the active pixel sensor (APS) using GBT photodetector is smaller than that of APS using the photodiode. This means that the resolution of the image can be increased. The high-gain GBT photodetector has a higher photosensitivity compared to the p-n junction photodiode that is used in a conventional APS. Because GBT has a high sensitivity, fast operation of the binary processing is possible. A CMOS image sensor with the binary processing can be designed with simple circuits composed of a comparator and a Dflip-flop while a complex analog to digital converter (ADC) is not required. In addition, the binary image sensor has low power consumption and high speed operation with the ability to switch back and forth between a binary mode and an analog mode.

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“…The emitter current becomes β times of the base current in a bipolar transistor. [1] The signal integrated in the emitter terminal will be β times of the signal generated in the basecollector pn junction. This amplification will resolve the problem caused by low illumination and short integration at the same time.…”

Section: Introductionmentioning

confidence: 99%

Effect of guard ring on sensitivity of the photo-transistor used in an optical mouse

Park

Kim

2012

2012 Second International Conference on Digital Information Processing and Communications (ICDIPC)

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In the operation of an optical mouse sensor, amplification of signal charge is necessary since low power dissipation and high speed are important. 3 kinds of structure of photo transistor were proposed to get high amplification gain. The performances were verified using 18pixel × 18pixel image sensor. The image sensor was manufactured using 0.18 μm design rule CMOS process. The highest sensitivity was appeared in structure which has no emitter layer on entire surface but has guard ring on boundary of the base. The guard ring maintains base voltage more uniform to get strong bipolar action. This image sensor was mounted in the mouse and showed sampling rate of motion detector up to 50 kH.

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A novel bipolar imaging device with self-noise-reduction capability

Cited by 36 publications

References 7 publications

Analysis of pixel gain and linearity of CMOS image sensor using floating capacitor load readout operation

Analysis of pixel gain and linearity of CMOS image sensor using floating capacitor load readout operation

High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

Effect of guard ring on sensitivity of the photo-transistor used in an optical mouse

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