This paper introduces a novel, inherently simple, and all-silicon wafer-level fabrication and hermetic packaging method developed for MEMS devices. The proposed method uses two separate SOI wafers to form highly-doped through-silicon vias (TSVs) and suspended MEMS structures, respectively. These SOI wafers are then bonded by Au-Si eutectic bonding at 400 • C, achieving hermetic sealing and signal transfer without requiring any complex via or trench refill process steps. The package vacuum is measured using encapsulated MEMS resonators to be as low as 15 mTorr with the help of successfully activated thin-film getters. The combined fabrication and packaging yield is around %89 and chips still maintain a package pressure below 100 mTorr after more than 6 years. The packages show an extremely high strong bonding strength (>40 MPa) and are proved to remain hermetic after temperature cycling (25 • C-85 • C) and harsh temperature shock (5 min@300 • C) tests. The all-silicon MEMS resonators fabricated and packaged using the proposed method project up to a 2.3× enhancement in the bias instability and ∼4× in the temperature sensitivity of frequency output compared to an identical MEMS resonator fabricated using the silicon-on-glass (SOG) technology.Index Terms-Wafer level vacuum packaging, through silicon via (TSV), MEMS devices.
I. INTRODUCTIONT HE operating environment is a key factor in determining the functional behavior of Micro-Electro-Mechanical Systems (MEMS) devices. Some of the MEMS devices including but not limited to gyroscopes, oscillators, and microbolometers require a vacuum-sealed environment for achieving high-performance operation. This unique requirement makes the hermetic encapsulation a crucial step for the commercialization of MEMS devices [1]- [3].There are two common approaches for wafer-level hermetic encapsulation of MEMS devices. The first approach uses the conventional thin film deposition techniques in order to form a capping layer on top of a suspended MEMS structure [4]- [10].