A Novel 2$N$ + 1 Carrier-Based Pulse Width Modulation Scheme for Modular Multilevel Converters With Reduced Control Complexity

Ronanki, Deepak; Williamson, Sheldon S.

doi:10.1109/tia.2020.3009078

Cited by 22 publications

(16 citation statements)

References 33 publications

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“…Thanks to this method, the most damaged cells can be preserved. Regarding MMC, this type of multilevel converter has received a great deal of study in terms of various aspects as output performance improvement [105][106][107][108], reduced computational burden [109][110][111], power losses balancing among SMs [104,112,113], etc. Due to the relatively large number of SMs, the ATC is usually conducted to achieve similar thermal stress distribution among the different SMs to enhance the lifetime of the power system [104].…”

Section: Cascaded Converter Systemmentioning

confidence: 99%

“…A method proposed in [116] achieved SM thermal balancing by regulating the capacitor voltage of each SM in an arm while keeping the sum of the SM capacitor voltages at nominal value to control the dc-link voltage. As shown in Figure 22, the temperature of each SM 𝑇𝑇 SM,𝑖𝑖 is compared with the Regarding MMC, this type of multilevel converter has received a great deal of study in terms of various aspects as output performance improvement [105][106][107][108], reduced computational burden [109][110][111], power losses balancing among SMs [104,112,113], etc. Due to the relatively large number of SMs, the ATC is usually conducted to achieve similar thermal stress distribution among the different SMs to enhance the lifetime of the power system [104].…”

Section: Cascaded Converter Systemmentioning

confidence: 99%

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Enhance Reliability of Semiconductor Devices in Power Converters

Nguyen¹,

Kwak²

2020

Electronics

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As one of the most vulnerable components to temperature and temperature cycling conditions in power electronics converter systems in these application fields as wind power, electric vehicles, drive system, etc., power semiconductor devices draw great concern in terms of reliability. Owing to the wide utilization of power semiconductor devices in various power applications, especially insulated gate bipolar transistors (IGBTs), power semiconductor devices have been studied extensively regarding increasing reliability methods. This study comparatively reviews recent advances in the area of reliability research for power semiconductor devices, including condition monitoring (CM), active thermal control (ATC), and remaining useful lifetime (RUL) estimation techniques. Different from previous review studies, this technical review is carried out with the aim of providing a comprehensive overview of the correlation between various enhancing reliability techniques and discussing the corresponding merits and demerits by using 144 related up-to-date papers. The structure and failure mechanism of power semiconductor devices are first investigated. Different failure indicators and recent associated CM techniques are then compared. The ATC approaches following the type of converter systems are further summarized. Furthermore, RUL estimation techniques are surveyed. This paper concludes with summarized challenges for future research opportunities regarding reliability improvement.

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Section: Cascaded Converter Systemmentioning

confidence: 99%

Section: Cascaded Converter Systemmentioning

confidence: 99%

Enhance Reliability of Semiconductor Devices in Power Converters

Nguyen¹,

Kwak²

2020

Electronics

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“…23 To circumvent these, a 2N + 1 levels generation with single carrier PWM is proposed in Ronanki and Williamson. 24 However, voltage and current sensors are required for the voltage balance control. [20][21][22][23][24] By rotating the carrier waveforms, sensors can be eliminated for the SM capacitor voltage balancing.…”

Section: Introductionmentioning

confidence: 99%

“…24 However, voltage and current sensors are required for the voltage balance control. [20][21][22][23][24] By rotating the carrier waveforms, sensors can be eliminated for the SM capacitor voltage balancing. 25 But, the need of generating multiple triangular carrier waveforms becomes burden to the processor with the increase in SM number.…”

Section: Introductionmentioning

confidence: 99%

A level enhanced voltage balancing method for modular multilevel converter without using sensors

Gobburi

Borghate

Meshram

2022

Circuit Theory & Apps

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The intrinsic characteristics such as modular structure, filterless operation, and absence of DC-link capacitor have made the modular multilevel converter (MMC) superior to the conventional multilevel converters. However, the submodule (SM) capacitor voltage balancing is crucial. This paper presents a voltage balance control method for MMC. The proposed method generates 2N + 1 levels (where N is the number of SMs per arm) which halves the step size of output voltage and improves the harmonic performance as compared to N + 1 level generation. It requires only one carrier per phase and no voltage and current measurements are needed for the implementation. Therefore, the proposed method makes the system cost-effective and reduces the implementation issues related with carrier-based methods substantially. It also alleviates the non-uniform charge distribution problem with the phase disposition pulse width modulation (PDPWM) technique. Further, a detailed mathematical analysis is presented which enhances the understanding of balancing algorithm. In addition to this, the circulating current with 2N + 1 modulation is analyzed and a control technique is presented. The proposed voltage balancing method is simulated comprehensively in MATLAB/SIMULINK software and validated by the experimental results obtained from a laboratory prototype.

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“…However, the generated multilevel waveform does not possess symmetry. A single carrier APOD‐PWM method is reported in [16] to generate 2 N +1 voltage levels. The generated output voltage has the same THD as that of the traditional APOD‐PWM method.…”

Section: Introductionmentioning

confidence: 99%

A hybrid level shifted carrier‐based PWM technique for modular multilevel converters

Kumar

Gopi

Biswas

et al. 2021

IET Power Electronics

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This paper presents a hybrid level shifted carrier‐based pulse width modulation (HLSC‐PWM) technique for modular multilevel converters (MMCs). The concept of the proposed HLSC‐PWM method is developed by combining the principles of phase disposition PWM (PD‐PWM), phase opposition disposition PWM (POD‐PWM), and alternate phase opposition disposition PWM (APOD‐PWM) methods. The main aim of the proposed HLSC‐PWM method is to generate an output voltage with half‐wave and quarter‐wave symmetries. The generated symmetrical PWM output voltage based on the proposed HLSC‐PWM method provides less total harmonic distortion (THD) and enhances the DC‐Link voltage utilization (DCLVU). A generalized mathematical model is formulated to develop a single HLSC for MMC with an N number of submodules (SMs) per arm. Theoretical analysis of DCLVU for the proposed method is described. The functionality and performance of the HLSC‐PWM method are carried out on a three‐phase five‐level MMC in MATLAB/Simulink. A hardware prototype of a single‐phase five‐level MMC is designed for experimental validation. The proposed HLSC‐PWM method is implemented on an Altera/Cyclone I series (EP1C12Q240C8N) field‐programmable gate array (FPGA), simulation and experimental results are presented.

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A Novel 2$N$ + 1 Carrier-Based Pulse Width Modulation Scheme for Modular Multilevel Converters With Reduced Control Complexity

Cited by 22 publications

References 33 publications

Enhance Reliability of Semiconductor Devices in Power Converters

Enhance Reliability of Semiconductor Devices in Power Converters

A level enhanced voltage balancing method for modular multilevel converter without using sensors

A hybrid level shifted carrier‐based PWM technique for modular multilevel converters

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