2011
DOI: 10.1016/j.cirp.2011.03.125
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A newly developed polishing pad for achieving high surface flatness without edge roll off

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Cited by 19 publications
(3 citation statements)
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“…In order to obtain a good pressure control in the CMP process, the finite element method (FEM)-based models have been used to compute the stress distribution and analyze the nonuniformity on the wafer surface. [48][49][50] The relative magnitude and radial position of the observed removal rate is reasonably consistent with the simulated contact stress uniformity. Therefore, the computational simulation of the contact pressure indicates that the removal rate uniformity can be improved by strictly controlling the uniformity of contact stress distribution on the wafer surface.…”
supporting
confidence: 76%
“…In order to obtain a good pressure control in the CMP process, the finite element method (FEM)-based models have been used to compute the stress distribution and analyze the nonuniformity on the wafer surface. [48][49][50] The relative magnitude and radial position of the observed removal rate is reasonably consistent with the simulated contact stress uniformity. Therefore, the computational simulation of the contact pressure indicates that the removal rate uniformity can be improved by strictly controlling the uniformity of contact stress distribution on the wafer surface.…”
supporting
confidence: 76%
“…According to the Preston equation, the removal rate of material in polishing is proportional to the contact stress and the relative velocity between the wafer and the polishing pad, which means the degree of edge roll-off is basically proportional to the contact stress distribution on the surface because the velocity at periphery of wafer is almost the same as that at center in polishing. Thus, the edge roll-off is considered to be generated by the significant increase in the contact stress near the wafer edge [3][4][5][6][7][8].…”
Section: Polishing Pad Properties Determining Edge Roll-offmentioning
confidence: 99%
“…Therefore, the zone of edge exclusion, where device chips cannot be manufactured, is set on the periphery of wafers. The width of the zone is seriously critical for the yield of the devices, and then the suppression in edge roll-off is strongly demanded in the wafer polishing [3][4][5].…”
Section: Introductionmentioning
confidence: 99%