New Evaluation Method of Polishing Pad Property for Estimating Edge Roll-Off of Silicon Wafer

Abstract

With the ever-growing demand for further increase in the integration density of semiconductor devices, silicon wafers as the substrates for most devices are required to be extremely flat. In particular, it is strongly required to suppress edge roll-off, which seriously deteriorates the surface flatness near the wafer edge during polishing process in the final stage of the wafer manufacturing. In this study, we investigate the properties of polishing pads required for decreasing edge roll-off and propose the evaluation method of the properties. Polishing experiments with silicon wafers and evaluation tests for polishing pads reveal that the proposed method can estimate the obtained edge surface flatness.