A New Self-Aligned A-SI TFT Using Ion Doping and Chromium Silicide Formation

Nishida, Shinichi; Uchida, Hiroyuki; Kaneko, Shigeo

doi:10.1557/proc-219-303

Cited by 13 publications

(1 citation statement)

References 3 publications

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“…Bottom gate, inverted-staggered, self-aligned TFT's have been reported using lift-off [1], ion-implantation and silicidation [2]- [4], backside laser recrystallization [5], and frontside laser doping [6]. No top gate, staggered, self-aligned TFT process has yet been reported, although coplanar top gate test TFT's, which give isolated TFT's without cross-overs, have been reported by ion implantation and silicidation [7] and by frontside laser recrystallization [8].…”

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An amorphous silicon thin-film transistor with fully self-aligned top gate structure

Powell

Glasse

Green

et al. 2000

IEEE Electron Device Lett.

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We have developed a novel fully self-aligned top gate amorphous silicon thin-film transistor, which shows excellent transistor characteristics. Self-alignment is achieved by patterning the gate electrode and then etching the silicon nitride gate insulator, followed by silicidation and ion implantation of the exposed a-Si in the contact regions. We obtain a long channel saturated mobility of 0.9 cm 2 V 1 s 1 , while for channel lengths of 6 m, we obtain an effective mobility of 0.6 cm 2 V 1 s 1 , in the saturated region and 0.5 cm 2 V 1 s 1 , in the linear region. This high level of performance, together with the negligible parasitic capacitance of the self-aligned structure, makes this transistor suitable for new demanding applications in active matrix liquid crystal displays and large area X-ray image sensors. Index Terms-Amorphous silicon, self-aligned, TFT, top gate.A MORPHOUS silicon thin-film transistors (TFT's) are used in the majority of high-quality active matrix liquid crystal displays. For today's applications, the performance of the amorphous silicon thin-film transistors is acceptable, but in the future, higher resolution displays and larger sized displays will require higher performance thin-film transistors. In particular, fully self-aligned thin-film transistors have increased performance by virtue of their very low and uniform parasitic capacitance. This gives lower and uniform kick-back voltage, which leads to improved image quality. For large sized X-ray image sensors, the very low parasitic capacitance significantly lowers the capacitance on the read-out line, which decreases the electronic noise in the read-out amplifier, thereby improving the overall signal-to-noise ratio (SNR), which is crucial for high-quality X-ray images. Self aligned TFT technology also allows smaller TFT's to be made, which leads to faster pixel charging, faster image sensor read-out and lower gate line capacitance.There have been many proposals for self-aligned amorphous silicon TFT's. Bottom gate, inverted-staggered, self-aligned TFT's have been reported using lift-off [1], ion-implantation and silicidation [2]-[4], backside laser recrystallization [5], and frontside laser doping [6]. No top gate, staggered, self-aligned TFT process has yet been reported, although coplanar top gate test TFT's, which give isolated TFT's without cross-overs, have been reported by ion implantation and silicidation [7] and by frontside laser recrystallization [8]. Few, if any, TFT's have been developed into a viable manufacturing process, since the real commercial need for fully self-aligned TFT's has not been ).Publisher Item Identifier S 0741-3106(00)02113-3. Fig. 1. Cross section of the self-aligned top gate TFT.present up until now. However, the state of display development is such that there is now a renewed interest in the subject, with a view to developing a commercially viable fully self-aligned amorphous silicon TFT process. In a previous paper, we developed a bottom gate fully selfaligned TFT, which used ion implantation and sil...

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An amorphous silicon thin-film transistor with fully self-aligned top gate structure

Powell

Glasse

Green

et al. 2000

IEEE Electron Device Lett.

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State‐of‐the art of a‐Si TFT/LCD

Tsukada

1994

Electron Comm Jpn Pt II

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The state‐of‐the‐art in active‐matrix liquid‐crystal displays based on amorphous silicon thin‐film transistors is described. This type of display appears to be the most promising flat‐panel display, and its mass production has just started to deliver 10‐inch class displays with 300‐K pixels. These display panels will have larger diagonal sizes and higher resolution than previous ones. the production of panels with more than one million pixels has also started. The factors controlling the design of these large and high‐resolution panels are the gate‐busline delay and the charging and discharging of the signal voltage on the pixel electrode. Analytical results show the panels larger than 30 inches and with a resolution exceeding 1, 000 lines can be designed. Another factor that affects the size and resolution of the panels is the parasitic capacitance of thin‐film transistor (TFT), which degrades the display quality. The fabrication process is then discussed along with such technical breakthroughs as stacked‐layer gate insulators and aluminum‐gate TFTs.

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Deposition of Intrinsic and Doped Semiconductor Thin Films for a-Si:H TFT

Kuo¹

2004

Thin Film Transistors

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A New Self-Aligned A-SI TFT Using Ion Doping and Chromium Silicide Formation

Cited by 13 publications

References 3 publications

An amorphous silicon thin-film transistor with fully self-aligned top gate structure

An amorphous silicon thin-film transistor with fully self-aligned top gate structure

State‐of‐the art of a‐Si TFT/LCD

Deposition of Intrinsic and Doped Semiconductor Thin Films for a-Si:H TFT

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