A New Physical Method Based on $CV$ –$GV$ Simulations for the Characterization of the Interfacial and Bulk Defect Density in High-$k$ /III-V MOSFETs

A novel technique exploiting C–V, G–V and I–V simulations to investigate defect distribution and native oxide in high-κ dielectrics for III–V MOSFETs

“…Firstly, the experimental I-V curve is simulated without including the contribution of any defects to evaluate the minimum thickness of the native Ga 2 O 3 oxide, t Ga2O3 , which could be also zero, thus giving the maximum flexibility. Once the minimum t Ga2O3 has been calculated, we applied the C-V/G-V defect spectroscopy technique described in [1,2] to extract the energy distribution of the defects in the gate oxide band-gap. Fig.…”

“…Traps at the III-V/high-j interface are known to degrade the performance of III-V MOSFET, reducing the channel mobility and the gate control on the channel. Several techniques have been proposed in the literature for the characterization of the interfacial and border trap density, which suffer from poor accuracy when applied to MOSFET with III-V channel materials [1]. New methods are therefore demanded to extract the properties of the high-j stack and the density of interfacial and bulk defects (N bt ) directly from electrical measurements, which allow speeding up the process optimization and the technology development.…”

“…New methods are therefore demanded to extract the properties of the high-j stack and the density of interfacial and bulk defects (N bt ) directly from electrical measurements, which allow speeding up the process optimization and the technology development. In this scenario, we present in this paper a new method that allows investigating the properties of the high-j stack (i.e., the presence of a native oxide and the distribution of defects within the dielectric layers of the gate oxide) by combining the defect spectroscopy based on C-V/G-V [1,2] and I-V simulations performed with the MDLab package [3]. The cross-correlation between different kind of measurements relying on the different sensitivity regions of I-V and C-V/G-V measurements allows extending the (E,z) region where defects can be detected inside the dielectric band-gap.…”

Extraction of interface and border traps in beyond-Si devices by accounting for generation and recombination in the semiconductor

“…The method used to extract the (E-z) distribution of defects is based on the simultaneous simulations of CV and GV characteristics measured over a wide frequency range [1,2], Fig. 2.…”

“…In this study we applied a new spectroscopic technique [1,2] based on the simultaneous simulations of C-V and G-V curves measured on a wide frequency range to extract the energy-position (E,z) map of interfacial and border tap densities within the gate dielectric stack. We applied this technique to MOS devices with Ge and In 0.53 Ga 0.47 As channels and high-k multi-layer dielectric stacks.…”