A new MOS photon-counting sensor operating in the above-breakdown regime

Abstract

A MOS optical sensor that utilizes avalanche multiplication in silicon is proposed and investigated "both theoretically and experimentally. The abovebreakdown operating regime is discussed and it is shown how a MOS photosensor may be operated in a photon counting mode by pulsing it into very deep depletion, beyond the point where avalanche "breakdown normally occurs. Avalanche discharges in such a MOS sensor are self-quenching due to the formation of an inversion layer. This self-quenching property suggests that a monolithic selfscanned array of MOS photon counting sensors should be possible. It is described how specially designed charge-coupled arrays (PC-CCD's) could be operated in this new regime. The high response of silicon in the visible and near infrared, compared with the responsive quantum efficiency of the commonlyused photocathode materials, gives the proposed imager a distinct advantage over presently-existing photon counting sensors in these spectral regions. It is shown that a PC-CCD must be fahricated on a p-type silicon substrate and illuminated from the back side in order to obtain a high avalanche initiation probability for the photogenerated carriers. It is also shown that all thermally activated, steady-state dark generation of carriers can be reduced to a negligible level by cooling the sensor to 100 K or less, while the generation due to interband tunneling may be reduced to an acceptable level by ensuring that the peak fields within the depletion region remain below approximately h.3 x 10^ Vcm "*". The dark generation due to band-to-band tunneling via trap states may make it necessary to restrict the peak fields to even lower values. Re-triggering following a breakdown pulse, due to charge trapping or impact ionization of these traps during the avalanche, is also analysed. Optical coupling due to light emission during the avalanche iii discharges is discussed and two methods for the prevention of this coupling between the image elements in linear arrays are described. MOS gates that break down either at the Si-SiO,, interface, or in the bulk at a n-p junction created by a buried n-channel, have been fabricated and operated above breakdown. The surface breakdown devices were operated .in a charge-injection mode while the bulk breakdown devices were operated in a charge transfer mode similar to that which would occur in a full PC-CCD imager. The surface breakdown devices exhibited excessive dark count rates that were attributed to the high electric fields at the Si-SiO^ interface. The bulk breakdown detectors were found to be far superior. They had very sharply peaked pulse height distributions and considerably lower dark pulse rates. Operation up to 12 volts above breakdown with a corresponding avalanche initiation probability greater than 0.9 was possible with these devices. Only a very weak temperature dependence of the dark pulse rate was observed, suggesting that a tunneling mechanism of dark carrier generation was limiting the performance of the bulk-breakdown devices. The magnitude of ...