A new manufacturing method of CMOS logic compatible 1T-CRRAM

Chen, Hung-Yu; Chen, Hsien-Hao; Kao, Yun-Feng; Chen, Ping‐Yu; King, Ya‐Chin; Lin, Chrong Jung

doi:10.1109/vlsi-tsa.2016.7480498

Cited by 3 publications

(4 citation statements)

References 4 publications

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“…The samples characterized in this study consist of onetransistor one-resistor (1T1R) contact RRAM (CRRAM) cells prepared by 28 nm CMOS logic technology. [21][22][23] The cross-sectional transmission electron microscopy (TEM) of a CRRAM cell is shown in Fig. 1, where the resistive switching film is composed of TiN=TiON=SiO 2 , sandwiched between the top tungsten and bottom Si electrodes.…”

Section: Categorizing Cells By Initial Statesmentioning

confidence: 99%

Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells

Kao

Hsieh

Chen

et al. 2017

Jpn. J. Appl. Phys.

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Variability has been one of the critical challenges in the implementation of large resistive random access memory (RRAM) arrays. Wide variations in set/reset, read and cycling characteristics can significantly reduce the design margin and feasibility of a memory array. Predicting the characteristics of RRAM cells is constructive to provide insights and to adjust the memory operations accordingly. In this study, a strong correlation between the cell performance and its initial state is found in contact RRAM (CRRAM) cells by 28 nm CMOS logic technology. Furthermore, a verifyreset operation is proposed to identify the type of conductive filament (CF) in a cell. Distinctive CRRAM characteristics are found to be linked directly to initial CFs, enabling preliminary screening and adaptive resets to address the large variability problems in sizable CRRAM arrays.

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Section: Categorizing Cells By Initial Statesmentioning

confidence: 99%

Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells

Kao

Hsieh

Chen

et al. 2017

Jpn. J. Appl. Phys.

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“…Statistical analysis on endurance of RRAM is collected from a 16 × 16 backfilled contact resistive random access memory (BCRRAM) array, which is fabricated by 0.18 μm CMOS logic process [32,33]. As shown on layout in Fig.…”

Section: Methodsmentioning

confidence: 99%

“…The relative element compositions along the depth of RRAM film are provided in energy-dispersive X-ray (EDX) spectroscopy analysis in Fig. 3, where TMO film of BCRAM cell is found to be composed of TiN/TiON/SiO 2 [32,33]. The electrical analysis is completed by a semiconductor parameter analyzer and a pulse generator.…”

Section: Methodsmentioning

confidence: 99%

An Early Detection Circuit for Endurance Enhancement of Backfilled Contact Resistive Random Access Memory Array

et al. 2021

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As one of the most promising embedded non-volatile storage solutions for advanced CMOS modules, resistive random access memory’s (RRAM) applications depend highly on its cyclability. Through detailed analysis, links have been found between noise types, filament configurations and the occurrence of reset failure during cycling test. In addition, a recovery treatment is demonstrated to restore the cyclability of RRAM. An early detection circuit for vulnerable cells in an array is also proposed for further improving the overall endurance of an RRAM array. Lifetime of RRAM can be extended to over 10 k cycles without fail bits in an array.

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“…Its added processing step to standard CMOS logic process platform is outlined in Figure 1(a). [36], [37] As illustrated, after transistor fabrication and resist protection oxide (RPO) layer deposition, inter layer dielectric (ILD) deposition and contact hole etching steps follow subsequently. Instead of keeping a remaining oxide layer in CRRAM process, complete removal of RPO film is expected on the specifically defined regions for BCRRAMs.…”

Section: Device Structurementioning

confidence: 99%

Reset Variability in Backfilled Resistive Random Access Memory and Its Correlation to Low Frequency Noise in Read

Kao

Lin

King

2020

IEEE J. Electron Devices Soc.

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Fast and stable switching between states is one of the key factors for the success resistive random access memory (RRAM) development. In an array, wide reset efficiency variation in RRAM cells is found to link to the characteristics of its low frequency noise (LFN) in bit-cell current. Through Monte Carlo simulation on randomly placing conductive filaments (CF), LFN characteristics correspond to the densities of the CF in the RRAM film. Further correlations between LFN features and the reset efficiency are found. In addition, CF topography are found to change after long term cycling tests. A trimming process is proposed to minimize the impacts of stochastic CF generation, leading to increase reset speed.INDEX TERMS Variability, resistive random access memory, low frequency noise, Monte Carlo simulation, conductive filament.

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A new manufacturing method of CMOS logic compatible 1T-CRRAM

Cited by 3 publications

References 4 publications

Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells

Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells

An Early Detection Circuit for Endurance Enhancement of Backfilled Contact Resistive Random Access Memory Array

Reset Variability in Backfilled Resistive Random Access Memory and Its Correlation to Low Frequency Noise in Read

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