1996
DOI: 10.1016/s0038-1101(96)00113-x
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A new lifetime characterization technique using drain current transients in SOI material

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Cited by 17 publications
(6 citation statements)
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“…Hall‐effect measurements on thin (<200 nm) boron‐doped nominally p‐type SIMOX samples indicated n‐type conduction in the top silicon layer, even though the substrate (below the BOX) remained p‐type. This a well established effect for SIMOX samples and has been attributed to the introduction of unintentional donors (leading to dopant overcompensation) during the implantation and annealing steps 23–28. The change in carrier type renders the influence of physisorbed water on the conductivity of either n‐type or overcompensated p‐type H‐SIMOX the same, causing electrons to accumulate on both surfaces.…”
Section: Resultsmentioning
confidence: 96%
“…Hall‐effect measurements on thin (<200 nm) boron‐doped nominally p‐type SIMOX samples indicated n‐type conduction in the top silicon layer, even though the substrate (below the BOX) remained p‐type. This a well established effect for SIMOX samples and has been attributed to the introduction of unintentional donors (leading to dopant overcompensation) during the implantation and annealing steps 23–28. The change in carrier type renders the influence of physisorbed water on the conductivity of either n‐type or overcompensated p‐type H‐SIMOX the same, causing electrons to accumulate on both surfaces.…”
Section: Resultsmentioning
confidence: 96%
“…The floating body is at the origin of several parasitic phenomena specific to SOI devices such as drain current overshoots and undershoots 17,18,20) or bipolar amplification. This last phenomenon is essential for the sensitivity of devices and circuits to single-event transient (SET).…”
Section: Three-dimensional Numerical Simulationmentioning
confidence: 99%
“…48,49 In the case of SOI wafers made by Smart Cut ™ , the interface quality is not degraded by hydrogen implantation or thermal annealing: the density of traps at the Si layer-BOX interface is less than 3 × 10 11 eV − 1 cm − 2 . 49 Moreover, Ionescu et al ., measuring carrier lifetimes by photoconductivity decay in the Si substrate and the transient ψ -MOSFET technique, 50 reported that carrier lifetimes in the top Si layer may be higher than 100 μ s in SOI made by Smart Cut ™ , which outperforms the value measured in SIMOX SOI.…”
Section: Soi Wafer Structures and Characterizationmentioning
confidence: 99%