2019
DOI: 10.1109/jeds.2018.2883585
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A New High-Gain Operational Amplifier Using Transconductance-Enhancement Topology Integrated With Metal Oxide TFTs

Abstract: This paper presents an integrated operational amplifier (OPAMP) consisting of only n-type metal oxide thin-film transistors. In addition to using positive feedback in the input differential pair, a transconductance-enhancement topology is applied to improve the gain of the OPAMP. The OPAMP has a voltage gain (A v) of 29.54 dB over a 3-dB bandwidth of 9.33 kHz at a supply voltage of 15 V. The unity-gain frequency, phase margin (PM), and dc power consumption (P DC) are 180.2 kHz, 21.5 • PM and 5.07 mW, respectiv… Show more

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Cited by 18 publications
(7 citation statements)
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“…A phase margin of 67° is reported with this work which ensures the stability of the circuit. From the frequency response of the circuit, unity gain frequency (fug) of 215 kHz is reported which is higher than [9, 2224]. However, a higher value of fug is reported in [8, 11] due to advancement in technology and fabrication process.…”
Section: Resultsmentioning
confidence: 99%
“…A phase margin of 67° is reported with this work which ensures the stability of the circuit. From the frequency response of the circuit, unity gain frequency (fug) of 215 kHz is reported which is higher than [9, 2224]. However, a higher value of fug is reported in [8, 11] due to advancement in technology and fabrication process.…”
Section: Resultsmentioning
confidence: 99%
“…The pseudo-PMOS load is shown to be inherently stable despite of having internal positive-feedback loop following the aforementioned condition. Additionally, positive-feedback techniques can also be deployed to boost the transconductance g m itself [10], [11], thus resulting in higher performance. However, in this report we focus on realization of high output impedance with such technique.…”
Section: Introductionmentioning
confidence: 99%
“…Since most IGZO TFTs operate in the enhancement mode with Vthbold-italic>bold0 V, the “pseudo‐E” variety has been more popularly deployed 13 . However, there are costs associated with the implementation of the pseudo‐CMOS design methodology, including larger circuit footprint, limited gain 14,15 and reduced circuit speed.…”
Section: Introductionmentioning
confidence: 99%