A new erasing and row decoding scheme for low supply voltage operation 16-Mb/64-Mb flash memories

Miyawaki, Y.; Nakayama, Tomohiro; Kobayashi, S.; Ajika, N.; Ohi, M.; Terada, Yasushi; Arima, Hideaki; Yoshihara, Tsutomu

doi:10.1109/4.126547

Cited by 16 publications

(3 citation statements)

References 14 publications

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“…(1) (2) where and are the total leakage current flowing through the junction of and , respectively, and are the forward voltage of and , respectively. On the other hand, the diode forward current is expressed by…”

Section: A Limit Of DC Stand-by Currentmentioning

confidence: 99%

“…R ECENTLY, it has become increasingly important to lower the supply voltage of flash memories for low-power handheld digital equipment. In [1], the pool method, which generates a wordline voltage even in stand-by state, is compared with the kicker method [2], which generates by kicking a boosting capacitor at every address transition, and the former is found to have the advantages of fast access time, low power, and small circuit area, but to be disadvantageous with respect to stand-by current. Fig.…”

Section: Introductionmentioning

confidence: 99%

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Wordline voltage generating system for low-power low-voltage flash memories

Tanzawa

Umezawa

Kuriyama

et al. 2001

IEEE J. Solid-State Circuits

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A low-power wordline voltage generating system is developed for low-voltage flash memories. The limit for the stand-by current including the operation current for the band-gap reference and the stand-by wordline voltage generator is discussed. The system was implemented on a 1.8-V 32-Mb flash memory fabricated with a 0.25-m flash memory process and achieved with very low stand-by current of 2 A typically, and high operating frequency of 25 MHz in read operation at 1.8 V. A low-voltage level shifter with high-speed switching is also proposed.

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Section: A Limit Of DC Stand-by Currentmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Wordline voltage generating system for low-power low-voltage flash memories

Tanzawa

Umezawa

Kuriyama

et al. 2001

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

show abstract

“…In order to get the word line voltage, a charge pump and a regulator are usually needed and several designs have been proposed to generate this voltage. The common problem for the present solutions [1,2,3] is the non-negligible power consumption in standby mode. In this paper, a voltage regulator circuit which generates the word-line voltage with low power in standby mode is proposed.…”

Section: Introductionmentioning

confidence: 99%