A new computer-aided multi-dimensional device modeling algorithm based on binning concepts

Mendhurwar, Kaustubha; Devabhaktuni, V.K.; Raut, R.

doi:10.1109/icmel.2008.4559325

Cited by 1 publication

(2 citation statements)

References 8 publications

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“…The simulation data is generated using a detailed HSPICE model, which then helps us to develop highly accurate neural models using the algorithms described in our previous papers [36][37][38][39]. A datasheet of simulation data is generated by sweeping the parameters within their minimum and maximum usable values.…”

Section: Ann Based Cadmentioning

confidence: 99%

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A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Mendhurwar

Sundani

Aggarwal

et al. 2011

Analog Integr Circ Sig Process

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There has been a constant endeavor towards improving the available circuit design automation tools to match technological advancements in the electronic industry. However, inadequate research efforts in the analog domain are holding back the exploitation of advanced technologies. A dearth of design expertise in the analog domain is the principal driving force for the growth of Design Automation (DA) tools. Transistor sizing is one of the most crucial steps in the analog IC design. In this paper, we put forward a new computer aided design framework for the sizing of transistors in MOS Integrated Circuit (IC) amplifiers by incorporating powerful modeling capabilities of Artificial Neural Networks (ANN). ANNs have proven to be efficient and accurate modeling tools in several applications. The proposed tool is capable of directly computing transistor related design parameters, of the MOS IC amplifier and associated peripheral circuitry. The proposed tool thus avoids several time-consuming simulations and/or tuning runs at the very bottom level of analog IC amplifier implementation, using a given CMOS process. It also reduces manual intervention in the design process, thus enhancing the automation of the design process. This paper presents design examples of several analog IC functional modules that are developed and verified successfully.

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Section: Ann Based Cadmentioning

confidence: 99%

“…2. Neural models are developed using the algorithms proposed in our previous papers [36][37][38][39][40][41]. 3.…”

Section: Analog Ic Design Flowmentioning

confidence: 99%

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Mendhurwar

Sundani

Aggarwal

et al. 2011

Analog Integr Circ Sig Process

Self Cite

View full text Add to dashboard Cite

show abstract

A new computer-aided multi-dimensional device modeling algorithm based on binning concepts

Cited by 1 publication

References 8 publications

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

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