A new compact DC model of floating gate memory cells without capacitive coupling coefficients

This paper discusses the electrical simulation of Non-Volatile Memor y Cells, based on the Floating Gate Cells, and aiming at the evaluation of Total Ionizing Dose (TID) effect of this memor y cell. An electrical model based on simple electric elements is implemented to allow the simulation of the floating gate using standard electrical simulations tools (e.g. Spice). For the evaluation of TID effects the electrical parameters of the MOS transistor (i.e threshold voltage and leakage current between de source and drain terminals) are varied according to experimental data from the literature

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“…The model use in this work was proposed in [8], due to robustness to convergence problems in DC analysis. force [5].…”

Section: Imentioning

confidence: 99%

“…The VCVS has the FG voltage as given by equation 2, where, the main function of the VCVS is to represent the FG storage state, and solve the convergence problems in DC analysis [8].…”

Section: B Electrical Model Of Fg Transistormentioning

confidence: 99%

Simulation of TID effect on floating gate cells

Aguirre

Wirth

2013

28th Symposium on Microelectronics Technology and Devices (SBMicro 2013)

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“…The Floating gate potential is given by the equation ( A new method without using coupling coefficient approach [12] i) Dummy cell approach: Dummy cell is nothing but a memory cell with its control gate and floating gate 'shorted' to each other. The dummy or reference cell is used for comparison with the actual cell.…”

Section: Figure1 Schematic Cross Section Of a Floating Gate Transistormentioning

confidence: 99%

“…A new method without using coupling coiffi dent approach A new mathematical model has been proposed in [12] that is able to reproduce the behavior of the floating gate memory cell in every bias condition. It describes an algorithm that is based on finding the zero of the charge balance equation at the Floating Gate node.…”

Section: Iii)mentioning

confidence: 99%

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Design and simulation equivalent model of Floating Gate Transistor

Kalyan¹,

Singh

2015

2015 Annual IEEE India Conference (INDICON)

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The [rrst Floating Gate Transistor (metal insulator-metal-insulator structure) was proposed by Kahng and Sze in 1967 [I]. Using the floating gate voltage value, capacitive coupling coefficients can be found out at different bias conditions as required. Once these have been found out for a particular technology, the values of the capacitances can be found out and implemented in the given model. The charge present on the gate has to be calculated using the transient models of hot electron programming and Fowler nordheim tunn eling. These can be incorporated and thus the model can be extended to the transient conditions as weU. The SPICE equivalent model is designed and Curr ent Voltage characteristics and Transfer characteristics are comparatively analyzed.

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Introduction

Floating Gate Devices: Operation and Compact Modeling

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A new compact DC model of floating gate memory cells without capacitive coupling coefficients

Cited by 45 publications

References 12 publications

Simulation of TID effect on floating gate cells

Simulation of TID effect on floating gate cells

Design and simulation equivalent model of Floating Gate Transistor

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