A New ATPG Technique (ExpoTan) for Testing Analog Circuits

Varaprasad, B.K.S.V.L.; Patnaik, L. M.; Jamadagni, H. S.; Agrawal, Vinod Kumar

doi:10.1109/tcad.2006.882596

Cited by 18 publications

(14 citation statements)

References 18 publications

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“…Different faulty circuits have different T (f )'s. Equation (20) shows that different test frequencies can produce different response amplitudes. It is necessary to find appropriate values of f and a to use in the test.…”

Section: Model and Algorithmmentioning

confidence: 99%

“…The signals in analog circuits are continuous in the time domain and in their value range [16,21]; so, it is difficult to build an analog fault model. Most test generation algorithms have used a single value in the fault model [19,20]. But even if many single values are used to represent faults, they cannot substitute for the actual faults that may occur, because the possible faulty values may vary over a continuous range for incomputable faults.…”

Section: Introductionmentioning

confidence: 99%

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A Classical Parameter Identification Method and a Modern Test Generation Algorithm

Long

Wang

2010

Circuits Syst Signal Process

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Many methods have been presented for the testing and diagnosis of analog circuits. Each of these methods has its advantages and disadvantages. In this paper we propose a novel sensitivity analysis algorithm for the classical parameter identification method and a continuous fault model for the modern test generation algorithm, and we compare the characteristics of these methods. At present, parameter identification based on the component connection model (CCM) cannot ensure that the diagnostic equation is optimal. The sensitivity analysis algorithm proposed in this paper can choose the optimal set of trees to construct an optimal CCM diagnostic equation, and enhance the diagnostic precision. But nowadays increasing attention is being paid to test generation algorithms. Most test generation algorithms use a single value in the fault model. But the single values cannot substitute for the actual faults that may occur, because the possible faulty values vary over a continuous range. To solve this problem, this paper presents a continuous fault model for the test generation algorithm which has a continuous range of parameters. The test generation algorithm with this model can improve the treatment of the tolerance problem, including the tolerances of both normal and faulty parameters, and enhance the fault coverage rate. The two methods can be applied in different situations.

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Section: Model and Algorithmmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Classical Parameter Identification Method and a Modern Test Generation Algorithm

Long

Wang

2010

Circuits Syst Signal Process

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“…But the actual testing results prove the voltage gap of 0.7 V is not always effective and accurate. Although, some special voltage gaps are used in some references [14,24,27], there is not specific method to solve ambiguity voltage gap for test node selection. Moreover, it is considered that single information gained from the fault dictionary is not the guarantee to the global optimal test node set.…”

Section: Introductionmentioning

confidence: 99%

“…For PN junction hard faults of diodes and audions, the deviate voltage from normal value is about 0.7 V. However, the ambiguity gap may be larger of less than 0.7 V for various faults. In papers [27] and [24], authors point out the voltage gap of 0.2 V is more suitable for low-voltage analog circuit. In addition, it is not accurate to set a unified voltage gap for various faults, because the voltage deviation intervals of different fault modes are not identical.…”

Section: Introductionmentioning

confidence: 99%

A New Optimal Test Node Selection Method for Analog Circuit

et al. 2012

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The existing test node selection methods of analog dictionary technique assume that the voltage gap of ambiguity group is 0.7 V. However, this technique is not always accurate to determine the right ambiguity gap for each fault mode. As the probability density of the circuit output approximately satisfies the normal distribution, an accurate technique is introduced to determine the ambiguity gap. Then, this paper proposes a new test node selection method with an extended fault dictionary and the overlapped area values. Firstly, the fault dictionary is constructed with the mean and standard variance values of node voltage. Then, the area detection table is generated by the overlapped area values under normal curves for ambiguity faults, which represent the failure probability of ambiguity faults. Finally, the optimal test node set is selected by fusing fault isolation and overlapped area information. The results show that the proposed method is effective to select the optimal test node set and improve the performance of analog fault diagnosis.

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“…Thus, some engineers have proposed a new test strategy called test generation. This can establish a convenient signal to excite the input of the device under test (DUT), observe the output [1][2][3][4][5][6], and decide whether the DUT is faulty based on the response. However, analog test generation differs from classical digital test generation.…”

Section: Introductionmentioning

confidence: 99%

Test generation algorithm for analog systems based on support vector machine

Long

Wang

2010

SIViP

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In some methods for test generation, an analog device under test (DUT) is treated as a discrete-time digital system by placing it between a digital-to-analog converter and an analog-to-digital converter. Then the test patterns and responses can be performed and analyzed in the digital domain. We propose a novel test generation algorithm based on a support vector machine (SVM). This method uses test patterns derived from the test generation algorithm as input stimuli, and sampled output responses of the analog DUT for classification and fault detection. The SVM is used for classification of the response space. When the responses of normal circuits are similar to those of faulty circuits (i.e., the latter have only small parametric faults), the response space is mixed and traditional algorithms have difficulty in distinguishing the two groups. However, the SVM provides an effective result. This paper also proposes an algorithm to calculate the test sequence for input stimuli using the SVM results. Numerical experiments prove that this algorithm can enhance the precision of test generation.

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A New ATPG Technique (ExpoTan) for Testing Analog Circuits

Cited by 18 publications

References 18 publications

A Classical Parameter Identification Method and a Modern Test Generation Algorithm

A Classical Parameter Identification Method and a Modern Test Generation Algorithm

A New Optimal Test Node Selection Method for Analog Circuit

Test generation algorithm for analog systems based on support vector machine

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