A new architecture for high throughput, low latency NB-LDPC check node processing

2017 IEEE International Workshop on Signal Processing Systems (SiPS)

Harb

et al. 2017

Self Cite

This paper focuses on low complexity architectures for check node processing in Non-Binary LDPC decoders. To be specific, we focus on Extended Min-Sum decoders and consider the state-of-the-art Forward-Backward and Syndrome-Based approaches. We recall the presorting technique that allows for significant complexity reduction at the Elementary Check Node level. The Extended-Forward architecture is then presented as an original new architecture for efficient syndrome calculation. These advances lead to a new architecture for check node processing with reduced area. As an example, we provide implementation results over GF(64) and code rate 5/6 showing complexity reduction by a factor of up to 2.6.

Section: A Construction Of the Discard Binary Vectormentioning

confidence: 99%

Section: B the Effect Of Re In Ecnsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Extended-forward architecture for simplified check node processing in NB-LDPC decoders

2017 IEEE International Workshop on Signal Processing Systems (SiPS)

Harb

et al. 2017

Self Cite

“…The SB algorithm, recently presented in [10] [11], is an efficient method to perform a parallel computation of the CN when q ≥ 16. This architecture was used for the first reported implementation of a GF(256) CN processor with degree d c = 4 [12].…”

Section: Introductionmentioning

confidence: 99%

Hybrid Check Node Architectures for NB-LDPC Decoders

IEEE Trans. Circuits Syst. I

Harb

et al. 2019

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This paper proposes a unified framework to describe check node architectures of Non-Binary LDPC decoders. Forward-Backward, Syndrome-Based and Pre-sorting approaches are first described. Then, they are hybridized in an effective way to reduce the amount of computation required to perform a check node. This work is specially impacting check nodes of high degrees (or high coding rates). Results of 28 nm ASIC post-synthesis for a check node of degree 12 (i.e. code rate of 5/6 with a degree of variable equal to 2) are provided for NB-LDPC over GF(64) and GF(256). While simulations show almost no performance loss, the new proposed Hybrid implementation check node increases the hardware and the power efficiency by a factor of six compared to the classical Forward-Backward architecture. This leads to the first ever reported implementation of a degree 12 check node over GF(256) and these preliminary results open the road to high decoding throughput, high rate, and high order Galois Field NB-LDPC decoder with reasonable hardware complexity.

“…Three categories of simplified EMS emerge frome state of the art. The Forward-Backward Check Node (FB-CN) algorithm [4] is efficiently implemented in [7] and [8] but can be limited in throughput due to its The Syndrome-Based Check Node (SB-CN) algorithm, recently presented in [10], [11], allows an efficient parallel computation of the CN function for high order Galois fields (q ≥ 16). However, the complexity of the SB-CN algorithm is dominated by the number z of syndromes to compute.…”

Section: Introductionmentioning

confidence: 99%

NB-LDPC check node with pre-sorted input

2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC)

2016

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Non-binary low-density parity-check codes have better communication performance compared to their binary counterparts but they suffer from higher complexity, especially for the check node processing. In this paper a sorting of the input vectors based on a reliability criteria is performed prior to the check node processing. This presorting process allows the Extended Min-Sum (EMS) check node process to focus its effort mainly on the weakest inputs. Proof is given for a check node of degree 12 in GF(64) for the syndrome based algorithm with a number of computed syndromes reduced by a factor of four which directly impacts the check node complexity without performance degradation.Index Terms-NB-LDPC, Check Node, syndrome-based, EMS.