A neuromorphic visual system using RRAM synaptic devices with Sub-pJ energy and tolerance to variability: Experimental characterization and large-scale modeling

Stochastic learning in oxide binary synaptic device for neuromorphic computing

“…Since the gradual RESET transition can provide multiple intermediate states, we define the learning with RESET-only as depression-only rule. In the previous work (Yu et al, 2012), we reported an analog synapse utilizing the depression-only learning rule for competitive learning. The reason why we only utilized the depression is that the RESET transition offers hundreds of states while the SET transition only offers binary states.…”

Modeling and design analysis of 3D vertical resistive memory — A low cost cross-point architecture

“…Another approach is to build a SPICE-compatible model [12] for ReRAM with full dynamics by incorporating the differential equations for the state variable of a ReRAM cell, which produces accurate results but the run time could go unbounded when simulating an array with > 10 5 cells. To maintain both good accuracy and simulation speed, we implement the representative I-V relationship of a typical ReRAM cell, based on the experimental results in Yu et al's work [13], as an HSPICE subcircuit. We take Table I.…”

Non-overlapped implantation (NOI) MOSFET synapse and its implementation on supervised neural network

“…However, the NOI synaptic reading and updating are accomplished by different biasing schemes which make NOI synapses difficult to simultaneously read and update. Other related techniques such as Resistive RAM (RRAM) have been proposed that use programmable resistance as biological synapse [13]. However, few researches have been conducted on a neural array with learning circuitry because RRAMs were still not mature in terms of material properties and were not fully compatible with existing IC fabrication technology.…”

“…In addition, the advantages of hardware realizations include high computation speed and relative ease of integration with analog interface. There are many varieties of structures and computational methods containing digital and analog forms in hardware neural implementation in past studies [7][8][9][10][11][12][13][14]. Among different concepts, the NVM device is considered the most promising for its analog memory nature and small chip area.…”