2009
DOI: 10.1109/tia.2009.2013580
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A Near-State PWM Method With Reduced Switching Losses and Reduced Common-Mode Voltage for Three-Phase Voltage Source Inverters

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Cited by 317 publications
(117 citation statements)
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“…This section will briefly describe the AZSPWM1 [2], [3], [4], the remote state PWM (RSPWM) [5], [6], and the near state PWM method [7]. While conventional three-phase PWM methods utilize the combination of active vector states and zero vector states to produce the desired output voltage, the RCMV-PWM techniques use only active vector states so their CMV can be significantly reduced.…”
Section: Common Mode Reduction Modulationmentioning
confidence: 99%
“…This section will briefly describe the AZSPWM1 [2], [3], [4], the remote state PWM (RSPWM) [5], [6], and the near state PWM method [7]. While conventional three-phase PWM methods utilize the combination of active vector states and zero vector states to produce the desired output voltage, the RCMV-PWM techniques use only active vector states so their CMV can be significantly reduced.…”
Section: Common Mode Reduction Modulationmentioning
confidence: 99%
“…However, the number of commutations in a switching cycle is increased compared to that of the SVM and may not be feasible in high power applications due to the high switching losses. A Near State PWM (NSPWM) employs three nearest active voltage vectors to synthesize the − → V ref [16], [17]. Out of these PWM schemes, the AZSPWM and the NSPWM are adopted to modulate the parallel interleaved VSCs because of their superior harmonic performance, as discussed in Section IV.…”
Section: B Reduced CM Voltage Pwm Schemesmentioning
confidence: 99%
“…The use of NSPWM and AZSPWM is limited in a single VSC system as the line-to-line voltage pulses exhibits bipolar pattern and results in more ripple in the line current [17]. However, in the case of the parallel interleaved VSCs, the pulse pattern of the resultant line-to-line voltage can be significantly improved by using an interleaving angle of 180…”
Section: A Pulse Patternsmentioning
confidence: 99%
“…The modified pulse pattern methods for the conventional two-level VSIs apply the active zero state PWM [15]- [17] and near state PWM [16], [17] methods to reduce CMV without using any extra components. These methods reduce CMV with a slightly increased ripple in line current because of the opposite pulses in line voltage.…”
Section: Introductionmentioning
confidence: 99%