A Monolithic 32-Channel Front End and DSP ASIC for Gaseous Detectors

The SALT—Readout ASIC for Silicon Strip Sensors of Upstream Tracker in the Upgraded LHCb Experiment

“…The development of low-power, large ( channels), complex readout ASICs with on-chip fast ADC in each channel has only recently become possible. Examples of such ASICs include the 32-channel SAMPA [ 10 ] ASIC for gaseous detectors in the ALICE experiment at LHC or the 128-channel SMX2 ASIC for silicon and gaseous tracking detectors for the future CBM experiment at FAIR [ 41 ]. Other prototype ASICs, presented so far only at conferences, are the 64-channel VMM [ 11 ] for tracking detectors at the upgraded ATLAS experiment at the LHC, the 32-channel FLAME [ 9 ] for the luminosity calorimeter in the future linear collider, or the 72-channel HGCROC [ 12 ] chip being developed for a future high granularity calorimeter in the CMS experiment at LHC.…”

“…Such an architecture was not possible to realise in the past, mainly due to high power consumption of the ADC. Recently, with advanced CMOS technologies and development of very low-power ADC architectures, it has become possible, and different groups started to develop readout ASICs [ 8 , 9 , 10 , 11 , 12 ] using such architecture. The latest trend is to add, beyond the amplitude measurement, timing information to the readout [ 8 , 11 , 12 ].…”

The upgrade of the ALICE TPC with GEMs and continuous readout

“…The SAMPA [57] is a custom integrated circuit containing 32 channels with selectable input polarity and five possible combinations of shaping time and sensitivity. The SAMPA was developed over -50 - a series of prototypes, and the v4 design was selected for mass production and instrumenting the ALICE TPC (about 20000 chips needed).…”

An application specific signal processor for gaseous detector systems in high energy physics experiment.

“…The gain, polarity and shaping time of the front-end are configurable through logic external input pins (HERNÁNDEZ et al, 2020). Source: Sanches and Velure (2018), HERNÁNDEZ (2015).…”

“…The second option is the usage of direct ADC data serialization to the SLVS outputs (HERNÁNDEZ et al, 2020;. The third option is a set of debug and test features to get direct access to these internal pins from outside of the chip, depending on the configuration used (SANCHES; VELURE, 2018).…”