A Minimum Hamming Distance Search Associative Memory Using Neuron CMOS Inverters

Abstract

Recently, high-speed searching for the most similar reference data out of the database is needed for data compression, image recognition, network control, and others. However, it takes much time to search for data with software, or hardware using conventional memory. Associative memory has been developed as a high-speed searching device. In this paper, we propose a minimum Hamming distance search associative memory using neuron CMOS inverters. The proposed associative memory is less affected by initial charge and a change of threshold voltage of neuron MOS transistors than conventional neuron CMOS circuits. The proposed circuit also makes searching speed higher by using fully parallel processing. We confirmed that the proposed circuit can be realized expected results by simulation, and experiment using test chip.

Energy Efficient Distance Computing: Application to K-Means Clustering

“…Instead of using the full analog implementation of the distance calculation core, a mixed-signal approach was proposed in [17,20] to find the minimum distance. Here, some of the calculations are performed in the digital domain, and the remaining calculations are performed in the analog domain.…”

“…Here, some of the calculations are performed in the digital domain, and the remaining calculations are performed in the analog domain. Note that the target application in references [17,20] is associated memory. It is still very similar to the application under consideration because the goal is to find data with a minimum distance from the presented input data among the data stored inside the memory.…”

“…Due to the binary data stored in memory, the initial part of the distance computation was implemented by digital subtraction based on the adder or XOR function. However, the latter portion still relies on the current mode squarer [20] or the neuron CMOS inverter-based computation [17]. Although the speed of the distance calculation could have improved somewhat due to the initial digital part, the overall computational time is still comparable to the analog counterpart because the main square function is still performed in the analog domain.…”

“…Compared to the synthesized digital CMOS baseline, our approach can potentially achieve ∼2.3× lower energy consumption. We also estimated the energy benefit of the proposed design using different datasets, such as Seeds Additionally, Table 1 provides a comparison of the proposed approach with previous work based on analog [18,19], mixed-signal [17] and digital [21,22] implementations for similar applications based on the same distance metric. Even though the target application of [18,21,22] and [17] are nearest neighbor search and associative memory, respectively, the baseline operation is quite similar.…”

“…However, despite the theoretical study and application of K-means clustering, efficient hardware implementation does not appear to have yet been achieved despite the simple and repetitive multiplication and addition operations required for distance calculation. Apart from the most intuitive approach to implementing clustering algorithms based on digital logic gates, various distance computing methods using analog [11][12][13][14][15] and mixed-mode design [16,17] have been proposed in the literature. As is well known, the digital-based approach can provide the most accurate and fast operating speed at the cost of area and power, while analog methods have comparable precision characteristics despite their simple structure.…”