A micromachined 4-port optical switch with no propagation length difference for add drop modules

Kwon, Hyejin; Kim, Man Geun; Lee, Jong‐Hyun; Kim, Seon Ju; Park, Jong Sam

doi:10.1109/omems.2003.1233499

Cited by 3 publications

(1 citation statement)

References 2 publications

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“…Presently, the SOI (silicon-on-insulator) substrate has been extensively employed in MEMS devices because of its simple yet reliable fabrication steps, higher yield and robust structures. Various transducers such as accelerometers, optical switches, etc, have been successfully demonstrated using SOI micromachining [7,8]. Many SOI packaging processes are taking advantage of the rapidly growing technology of the through-wafer via.…”

Section: Introductionmentioning

confidence: 99%

Implementation of three-dimensional SOI-MEMS wafer-level packaging using through-wafer interconnections

Lin

Yang

Wang

et al. 2007

J. Micromech. Microeng.

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Packaging is an emerging technology for microsystem integration. The silicon-on-insulator (SOI) wafer has been extensively employed for micromachined devices for its reliable fabrication steps and robust structures. This research reports a packaging approach for silicon-oninsulator-micro-electro-mechanical system (SOI-MEMS) devices using through-wafer vias and anodic bonding technologies. Through-wafer vias are embedded inside the SOI wafers, and are realized using laser drilling and electroplating. These vias provide electrical signal paths to the MEMS device, while isolating MEMS devices from the outer environment. A high-strength hermetic sealing is then achieved after anodic bonding of the through-wafer-vias-embedded SOI wafer to a Pyrex 7740 glass. Moreover, the packaged SOI-MEMS chip is compatible with surface mount technology, and provides a superior way for 3D heterogeneous integration.

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Section: Introductionmentioning

confidence: 99%