A MATLAB compiler for distributed, heterogeneous, reconfigurable computing systems

Banerjee, P.; Shenoy, Niraj; Choudhary, Alok; Hauck, Scott; Bachmann, Christian; Haldar, M.; Joisha, Pramod G.; Jones, A.; Kanhare, A.; Nayak, Ameeya Kumar; Periyacheri, S.; Walkden, M.; Zaretsky, David

doi:10.1109/fpga.2000.903391

Cited by 72 publications

(56 citation statements)

References 11 publications

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“…Software that makes use of this approach: Otter [40], RT-Express [28], ParAL [36], FALCON [18], CONLAB [20], MATCH [7], and Menhir [14] These projects compile MATLAB scripts into an executable, sometimes translating the scripts into a compiled language as an intermediate step. Some projects, e.g., [40] and [20], link the compiled code with parallel numerical libraries, while some software, e.g., [18], generates code that is already parallel.…”

Section: Matlab Compilersmentioning

confidence: 99%

Parallel MATLAB: Doing it Right

2005

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MATLAB is one of the most widely used mathematical computing environments in technical computing. It is an interactive environment that provides high-performance computational routines and an easy-to-use, C-like scripting language. It started out as an in-1) Memory model: Distributed memory was the dominant model for parallel computers, and for linear algebra applications, scatter/gather of the matrix took too long to make parallel computation worthwhile. 2) Granularity: For typical use, MATLAB spends most of its time in the parser, interpreter and graphics routines, where any parallelism is difficult to find. Also, to handle embarrassingly parallel applications, which only requires a collection of results at the end, MATLAB would require fundamental changes in its architecture. 3) Business situation: There were not enough customers with parallel computers to support the development. It has been nine years since the article was written, and we have seen tremendous changes in the computing world. These changes have invalidated the arguments that there should not be a parallel MATLAB. 1) Memory model: As modern scientific and engineering problems grow in complexity, the computation time and memory requirements skyrocket. The increase in processor speed and the amount of memory that can fit in a single machine could not catch up with the pace of computation requirements. Very often, current scientific problems simply do not fit into the memory of a single machine, making parallel computation a necessity. This has always been true throughout the history of computing-problems just do not fit into memory. But we have hit the point where a lot of interesting and practical problems from different areas do not fit into memory of a single machine. This has made parallel computing a necessity.

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Section: Matlab Compilersmentioning

confidence: 99%

Parallel MATLAB: Doing it Right

2005

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“…• Utilization, : the maximum PE array utilization is the maximum ratio of active PEs and the number of PEs, . It is obtained by (8) where denotes the cardinality or size of set . On the other hand, the average utilization is the ratio of the number of MODG nodes and the product (9) • Number of input-output ports, #IO: due to limited number of physical I/O pins of a given target architecture, it is important to minimize the number of I/O ports.…”

Section: ) Mapping Objective Functions: Performancementioning

confidence: 99%

“…During partitioning, embedded memory is utilized to save the interfacing pins among FPGAs. The MATCH project [8] maps Matlab nested loop algorithms for FPGA implementation. The loop body is pipelined to a number of stages and scheduled subject to memory constraints so that each loop iteration is started every initiation period.…”

Section: Introductionmentioning

confidence: 99%

Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures

Kittitornkun

2003

IEEE Trans. VLSI Syst.

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Abstract-Recently, FPGAs (field programmable gate arrays) technology have made significant advances in both speed and capacity. Millions of logic gates are now available for reconfiguration programming. To fully exploit the potential of so many programmable devices, powerful design methodology must be developed. In this paper, we propose a novel systematic computer-aided design methodology that can efficiently implement deeply nested do-loop algorithms on a FPGA. Specifically, our design methodology maps the loop dependence graph onto a linear array of locally connected processing elements to exploit parallelism. Due to the regular structure of this linear array of processors, it can be easily implemented on a FPGA. While this method is based on conventional systolic array design methodology, our proposed approach exhibits two distinct features that contribute to its superior performance: 1) We developed a novel multiple-order dependence graph representation that is able to efficiently represent distinct, yet correct algorithm execution orders. 2) We developed new FPGA-specific architectural constraints during the mapping process. As such, FPGA implementations based on our approach will utilize much fewer lookup tables while achieving superior performance.

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“…The approach taken by CHAMPION is similar to that of several other research programs at Colorado State University and Northwestern University [7][8]. However, in our case, we perform synthesis and place/route on our library cells in advance.…”

Section: Introductionmentioning

confidence: 99%

CHAMPION: A Software Design Environment for Adaptive Computing Systems and Application Specific Integrated Circuits (ASICs)

Bouldin¹

2001

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A MATLAB compiler for distributed, heterogeneous, reconfigurable computing systems

Cited by 72 publications

References 11 publications

Parallel MATLAB: Doing it Right

Parallel MATLAB: Doing it Right

Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures

CHAMPION: A Software Design Environment for Adaptive Computing Systems and Application Specific Integrated Circuits (ASICs)

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