A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit

A single-chip low-power transceiver IC operating in the 2.4 GHz ISM band is presented. Designed in 0.18 µm CMOS, the transceiver system employs direct-conversion architecture for both the receiver and transmitter to realize a fully integrated wireless LAN product. A sigma-delta (Σ∆) fractional-N frequency synthesizer provides on-chip quadrature local oscillator frequency. Measurement results show that the receiver achieves a maximum gain of 81 dB and a noise figure of 8.2 dB, the transmitter has maximum output power of −3.4 dBm and RMS EVM of 6.8%. Power dissipation of the transceiver is 74 mW in the receiving mode and 81 mW in the transmitting mode under a supply voltage of 1.8 V, including 30 mW consumed by the frequency synthesizer. The total chip area with pads is 2.7 × 4.2 mm 2 .

show abstract

“…0.13 µm CMOS 1.2/2.5 3.5 N/A -13 N/A -2.5 128/151 JSSC,2008 [13] * * 0. Table 2 summaries the performance of the measured IC.…”

Section: Discussionmentioning

confidence: 99%

A low-power monolithic CMOS transceiver for 802.11b wireless LANs

Xia

Yongzheng

et al. 2009

J. Semicond.

View full text Add to dashboard Cite

show abstract

“…Since active radios (e.g. Wi-Fi, LoRa, BLE) are composed of complex and area intensive components such as power ampli ers, mixers, local oscillators operating at RF frequencies, the RF front end in these systems (excluding the digital baseband) typically occupies about 10 mm 2 of die area [22,28,37,38,45]. In contrast, backsca er systems such as RFID tags are much simpler and occupy signi cantly lower area.…”

Section: Cost Analysismentioning

confidence: 99%

LoRa Backscatter: Enabling The Vision of Ubiquitous Connectivity

Talla¹,

Hessar²,

Kellogg³

et al. 2017

Preprint

View full text Add to dashboard Cite

† Co-primary Student Authors e vision of embedding connectivity into billions of everyday objects runs into the reality of existing communication technologies -there is no existing wireless technology that can provide reliable and long-range communication at tens of microwa s of power as well as cost less than a dime. While backsca er is low-power and low-cost, it is known to be limited to short ranges. is paper overturns this conventional wisdom about backsca er and presents the rst wide-area backsca er system. Our design can successfully backsca er from any location between an RF source and receiver, separated by 475 m, while being compatible with commodity LoRa hardware. Further, when our backsca er device is co-located with the RF source, the receiver can be as far as 2.8 km away. We deploy our system in a 4,800 f t 2 (446 m 2 ) house spread across three oors, a 13,024 f t 2 (1210 m 2 ) o ce area covering 41 rooms, as well as a one-acre (4046 m 2 ) vegetable farm and show that we can achieve reliable coverage, using only a single RF source and receiver. We also build a contact lens prototype as well as a exible epidermal patch device a ached to the human skin. We show that these devices can reliably backsca er data across a 3,328 f t 2 (309 m 2 ) room. Finally, we present a design sketch of a LoRa backsca er IC that shows that it costs less than a dime at scale and consumes only 9.25 µW of power, which is more than 1000x lower power than LoRa radio chipsets.CCS Concepts: •Hardware →Communication hardware, interfaces and storage; •Human-centered computing →Ubiquitous and mobile computing;

show abstract

“…For high-performance modems, many necessary power and performance calibrations are done using loopback switches [4]. The analog behavioral model we delivered for cellular firmware development emphasized first order performance and loopback connectivity.…”

Section: Case Study: Emulation Of a Cellular Modemmentioning

confidence: 99%

“…Designs that consist of a multiple chip solution with analog and digital designs segregated into their own die are now realized in System-on-Chip (SoC) designs [2], [3]. Simultaneously, modern high-performance analog/radio frequency (RF) designs rely on calibration algorithms that are driven by digital/firmware control [4]. Because of this, calibration loops now cross between the analog datapath and a digital/firmware calibration engine [2].…”

Section: Introductionmentioning

confidence: 99%

Pragma-based floating-to-fixed point conversion for the emulation of analog behavioral models

Nothaft

Fernández

Cefali

et al. 2014

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

View full text Add to dashboard Cite

Design teams have embraced hardware verification accelerators that enable pre-silicon firmware development. However, emulation is inapplicable for large mixed signal designs. We introduce a methodology that allows for the reuse of analog behavioral models in verification accelerators. We provide a set of pragmas that allow real number models to be converted to fixed point and synthesized and introduce an approach for demonstrating the correctness of these models. We demonstrated this by emulating a large cellular modem within 3,000× the speed of real life, a 3,000,000× speedup over analog simulations, and a 120× speedup over RTL simulations.

show abstract

A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit

Cited by 25 publications

References 7 publications

A low-power monolithic CMOS transceiver for 802.11b wireless LANs

A low-power monolithic CMOS transceiver for 802.11b wireless LANs

LoRa Backscatter: Enabling The Vision of Ubiquitous Connectivity

Pragma-based floating-to-fixed point conversion for the emulation of analog behavioral models

Contact Info

Product

Resources

About