A Low-Power SiGe BiCMOS 190-GHz Transceiver Chipset With Demonstrated Data Rates up to 50 Gbit/s Using On-Chip Antennas

Fritsche, David; Stärke, Paul; Carta, Corrado; Ellinger, Frank

doi:10.1109/tmtt.2017.2677908

Cited by 96 publications

(25 citation statements)

References 22 publications

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“…The schematic of the proposed mixer is shown in Figure . Compared with the stand Gilbert mixer, the differential pair below the mixing quad is replaced by transistors Q 5 to Q 7 . This structure acts as an active balun.…”

Section: Circuit Descriptionmentioning

confidence: 99%

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Transformer matched gilbert mixer with active balun for D band transmitter

Chen

et al. 2019

Micro & Optical Tech Letters

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A Gilbert mixer for the application of a D band transmitter is presented. In the work, the differential pair below the mixing quad is replaced by an active balun. A source resistor is introduced to improve balance performance of the active balun. Owing to the resistor, the LO‐to RF isolation of the mixer is also improved. At the output end, a transformer‐based balun is used to transform differential signal to single‐end signal and realize wideband output match. The circuit is designed on a 130 nm SiGe BiCMOS technology with fT/fmax of 300/500 GHz. The compact mixer covers 5 GHz intermediate frequency (IF) tuning range (1 to 6 GHz) with LO frequency fixed at 150 GHz. The measured RF 3‐dB bandwidth varying from 128 to 160 GHz with maximum −6 dB conversion gain, when the LO frequency is tuned. And the output referred 1‐dB compression point (OP1dB) is nearly −15 dBm. The mixer except test circuit consumes 14 mW DC power.

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Section: Circuit Descriptionmentioning

confidence: 99%

“…It is important that the up‐conversion mixers for sub‐THz application have a good rejection of LO‐to‐RF leakage and high output 1‐dB compression point. Numerous up‐conversion mixers over 100 GHz have been presented . And Gilbert topology is commonly utilized in the proposed mixers for its good LO‐to‐RF isolation.…”

Section: Introductionmentioning

confidence: 99%

Transformer matched gilbert mixer with active balun for D band transmitter

Chen

et al. 2019

Micro & Optical Tech Letters

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“…We will demonstrate that this is enough to provide compelling performance gains even if wireless interfaces are shared by a few computing cores. As CMOS technologies evolve and alternative technologies such as BiCMOS or graphene come into play, one can ultimately envisage integration on a per-core basis and aggregated speeds in the order of 100 Gb/s [16], [32], [33], [34].…”

Section: Overview Of Orthonocmentioning

confidence: 99%

OrthoNoC: A Broadcast-Oriented Dual-Plane Wireless Network-on-Chip Architecture

Abadal

Torrellas

Alarcón

et al. 2018

IEEE Trans. Parallel Distrib. Syst.

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Abstract-On-chip communication remains as a key research issue at the gates of the manycore era. In response to this, novel interconnect technologies have opened the door to new Network-on-Chip (NoC) solutions towards greater scalability and architectural flexibility. Particularly, wireless on-chip communication has garnered considerable attention due to its inherent broadcast capabilities, low latency, and system-level simplicity. This work presents ORTHONOC, a wired-wireless architecture that differs from existing proposals in that both network planes are decoupled and driven by traffic steering policies enforced at the network interfaces. With these and other design decisions, ORTHONOC seeks to emphasize the ordered broadcast advantage offered by the wireless technology. The performance and cost of ORTHONOC are first explored using synthetic traffic, showing substantial improvements with respect to other wired-wireless designs with a similar number of antennas. Then, the applicability of ORTHONOC in the multiprocessor scenario is demonstrated through the evaluation of a simple architecture that implements fast synchronization via ordered broadcast transmissions. Simulations reveal significant execution time speedups and communication energy savings for 64-threaded benchmarks, proving that the value of ORTHONOC goes beyond simply improving the performance of the on-chip interconnect.

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“…been demonstrated between 100 -300 GHz [38], [39], achieving data-rates up to 120 Gb/s. Led by the demands of the digital IC market, scaling of traditional CMOS transistors has also pushed their operation into the THz region [40], [41], [42].…”

Section: Introductionmentioning

confidence: 99%