A Low-Power Self-Forward-Body-Bias CMOS LNA for 3–6.5-GHz UWB Receivers

This article presents an inductorless wideband balun low noise amplifier (LNA), which uses noise reduction and linearity optimization techniques at low supply voltages. The proposed self forward body biased LNA uses inverter type amplifier structure as input stage for impedance matching while output stages are noise reduction stages, which partially cancel the noise of the input stage. In addition to noise reduction, transistors are biased nearzero third-order transconductance region to maximize third-order input-referred intercept point (IIP3) performance at low supply voltages. The LNA, implemented in 180 nm RFCMOS technology, is evaluated at 1 and 0.9 V supply voltages to show low voltage operation. It shows a maximum voltage gain of 19.7 dB with a minimum noise figure of 2.7 dB and a maximum 3-dB bandwidth that spans from 300 MHz to 1.83 GHz. The minimum achieved IIP3 at 0.9 V supply voltage is −1.7 dBm. The circuit draws a maximum current of 10.36 mA from 1 V power supply and occupies an area of 0.08 mm 2 .

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“…The values of R B1 , R B2 , and R B3 have been chosen according to the methodology discussed in Ref. 4. However, the LNA in Ref.…”

Section: Proposed Lna Circuitmentioning

confidence: 99%

“…However, the LNA in Ref. 4 uses inductors for its high‐frequency operation and noise reduction. Further, the IIP3 performance reported is also poor.…”

Section: Proposed Lna Circuitmentioning

confidence: 99%

Low‐power inductorless wideband SFBB balun low noise amplifier with noise reduction and third‐order transconductance optimization

Tiwari

Mukherjee

2020

Micro & Optical Tech Letters

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“…ULV Design Techniques 1) Self-FBB: ULV operation of the LNA is made feasible by employing several techniques. The first is to mitigate short channel effects through the FBB as described in Section II, which is implemented by adding R sub between the bodies of M1 and M2 [28]. Fig.…”

Section: E Noise Figurementioning

confidence: 99%

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

Parvizi

Allidina²,

El-Gamal

2016

IEEE J. Solid-State Circuits

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This work examines the use of a forward body biasing (FBB) scheme to mitigate output conductance degradation due to short channel effects in ultra-low voltage (ULV) circuits with no additional power consumption. It is shown that FBB boosts the output resistance of a transistor such that the intrinsic gain reduction due to low-supply voltages can be compensated. This technique is then used to implement a low-noise amplifier (LNA) tailored for ultra-low power (ULP) and ULV applications. The proposed LNA uses common-gate (CG) NMOS transistors as input devices in a complementary current-reuse structure. Low-power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor. Moreover, a separate FBB scheme is exploited to tune the feedback coefficient. An inductive g m-boosting technique is used to increase the bandwidth of the LNA without additional power consumption. The proposed LNA is implemented in an IBM 0.13 µm 1P8M CMOS technology and occupies 0.39 mm 2 . The measured LNA has a 14 dB gain, 4 dB minimum noise figure, IIP3 of −10 dBm, and 0.6-4.2 GHz bandwidth, while consuming only 500 µA from a 0.5 V supply. The LNA operates with supplies as low as 0.4 V while maintaining good performance. Index Terms-Current-reuse, forward body bias (FBB),inductive gm-boosting, low-noise amplifier (LNA), short channel effect mitigation, tunable active shunt-feedback, ultra-low power (ULP), ultra-low voltage (ULV). His research interests include ultra-low power IC design, MEMS-based microsystems, advanced packaging, and efficient high-volume test and calibration strategies. Mourad N. El-Gamal (S'92-M'99) received the B.Sc. (Hons.) degree from Ain-Shams University, Cairo, Egypt, in 1987, the M.Sc. degree (minor in computer science) from Vanderbilt University,

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“…To use body bias NMOSFET, a deep Nwell process is needed. In addition, a deep Nwell process can reduce noise cross-talk through the substrate [39].…”

Section: Analysis Of Body Biased Techniquementioning

confidence: 99%

Systematic Approaches of UWB Low-Power CMOS LNA with Body Biased Technique

Hsu¹,

Wu²,

Chiu³

2015

WET

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This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed in detail. The power reduction can be achieved by using body biased technique and current-reused topology. The optimum width of the major transistor device M1 is determined by the power-constraint noise optimization with inner parasitic capacitance between the gate and source terminal. The derivation of the signal amplification S21 by high frequency small signal model is displayed in the paper. The optimum design of the complete circuit was studied in a step by step analysis. The measurements results show that the proposed circuit has superior S11, gain, noise figure, and power consumption. From the measured results, S11 is lower than −12 dB, S22 is lower than −10 dB and forward gain S21 has an average value with 12 dB. The noise figure is from 4 to 5.7 dB within the whole band. The total power consumption of the proposed circuit including the output buffer is 4.6 mW with a supply voltage of 1 V. This work is implemented in a standard TSMC 0.18 µm CMOS process technology.

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A Low-Power Self-Forward-Body-Bias CMOS LNA for 3–6.5-GHz UWB Receivers

Cited by 50 publications

References 9 publications

Low‐power inductorless wideband SFBB balun low noise amplifier with noise reduction and third‐order transconductance optimization

Low‐power inductorless wideband SFBB balun low noise amplifier with noise reduction and third‐order transconductance optimization

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

Systematic Approaches of UWB Low-Power CMOS LNA with Body Biased Technique

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