A Low-Power CMOS Receiver for 5 GHz WLAN

Homayoun, Aliakbar; Razavi, Behzad

doi:10.1109/jssc.2014.2386900

Cited by 39 publications

(16 citation statements)

References 24 publications

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“…R F and C F can be tuned through 6-bit digitally controlled signals to compensate for the variation in the 3-dB cut-off frequency caused by the PVT variations. The second-order biquad filter adopts a non-invasive G m -C filter topology, which exhibit a higher linearity and lower noise than the conventional biquad G m -C topologies [18], [19]. As shown in Fig.…”

Section: Fifth-order Chebyshev-ii Filtermentioning

confidence: 99%

2.4 GHz BLE Receiver With Power-Efficient Quadrature RF-to-Baseband-Current-Reuse Architecture for Low-Power IoT Applications

Park

Kwon

2021

IEEE Access

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In this paper, a 2.4 GHz Bluetooth low energy receiver employing a power-efficient quadrature RF-to-baseband-current-reuse architecture is presented for low-power low-voltage internet of things applications. The proposed quadrature RF-to-baseband-current-reuse RF front-end consists of a lownoise transconductance amplifier, an active-type polyphase filter-based quadrature generator, transimpedance amplifiers, and double-balanced current-mode passive mixers on a single dc current path. An input matching network is used to perform power-constrained simultaneous noise and input power matching and 1/f noise reduction in the RF and baseband domains, respectively. The quadrature RF signals are provided to the single-quadrature mixers through an embedded active-type polyphase filter-based quadrature generator. The implemented Bluetooth low energy receiver is composed of the RF-to-basebandcurrent-reuse RF front-end, IF amplifiers, two-stage passive-RC polyphase filter, and fifth-order Chebyshev-II G m -C filters. The proposed design was fabricated using a 65-nm CMOS process and characterized primarily in the Bluetooth low energy operating frequency bands. The active die area of the implemented receiver was 0.85 mm 2 , and the receiver drew a bias current of 1.41 mA from a nominal supply voltage of 0.8 V. The Bluetooth low energy receiver achieved a noise figure of 13.2 dB, conversion gain of 42 dB, image rejection ratio of more than 30 dB, and input-referred third-order intercept point of −25 dBm.INDEX TERMS Active-type polyphase filter, bias-current sharing, Bluetooth low energy, current-reuse, image rejection ratio, IoT, I/Q mismatch, low-IF receiver, low-voltage, non-invasive filter, quadrature generator, quadrature transconductor, RF-to-BB-current-reuse

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Section: Fifth-order Chebyshev-ii Filtermentioning

confidence: 99%

2.4 GHz BLE Receiver With Power-Efficient Quadrature RF-to-Baseband-Current-Reuse Architecture for Low-Power IoT Applications

Park

Kwon

2021

IEEE Access

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“…Since a WLAN operates in the 2.4‐GHz and 5‐GHz frequency bands , it is necessary to design a transceiver that is suitable for each WLAN standard. In a WLAN receiver, the role of an LNA is to provide voltage gain and input matching with an acceptable noise figure (NF) using an appropriate power . Thus, it is important for the LNA's performance to include low noise, high gain, and low power consumption.…”

Section: Introductionmentioning

confidence: 99%

A 5‐GHz highly linear floating‐body CMOS LNA with switched gain control

Lee

Kwon

2017

Micro & Optical Tech Letters

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A 5‐GHz highly linear floating‐body CMOS low‐noise amplifier (LNA) with switched gain control is presented. The proposed LNA achieves very low noise in gain mode and high linearity and very low power consumption in bypass mode. In the gain mode, the LNA consumes 19.5 mW of power and achieves a noise figure of 1.15 dB, a gain of 13.8 dB, and an input IP3 of 3 dBm at 5 GHz. In the bypass mode, the LNA consumes only 1 μW and achieves a gain of −4.3 dB and an input IP3 of 7 dBm at 5 GHz. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:593–596, 2017

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“…Abidi discussed power-conscious design of wireless circuits in [17], and Nilsson [18] later attempted to extend the analog power concept in [16] to such circuits. Homayoun and Razavi [19] recently presented some innovative ideas for power saving in a wireless receiver.…”

mentioning

confidence: 99%

“…(17), so if we can increase Rs we may decrease gm for the same noise figure. And Rs can be increased by a passive impedance transformer at the LNA input [17,18,19]. In [18] it was shown that an impedance transformer based on an external inductance (figure 6b) will have an impedance transformation ratio equal to the Q-value of the external inductance, which may be about 35 at 2.4GHz.…”

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confidence: 99%

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Towards Power Centric Analog Design

Svensson

2015

IEEE Circuits Syst. Mag.

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Linköping University Post PrintAbstract. Power consumption of analog systems is poorly understood today, in contrast to the very well developed analysis of digital power consumption. We show that there is good opportunity to develop also the analog power understanding to a similar level as the digital. Such an understanding will have a large impact in the design of future electronic systems, where low power consumption will be crucial. Eventually we may reach a power centric analog design methodology.Introduction.

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A Low-Power CMOS Receiver for 5 GHz WLAN

Cited by 39 publications

References 24 publications

2.4 GHz BLE Receiver With Power-Efficient Quadrature RF-to-Baseband-Current-Reuse Architecture for Low-Power IoT Applications

2.4 GHz BLE Receiver With Power-Efficient Quadrature RF-to-Baseband-Current-Reuse Architecture for Low-Power IoT Applications

A 5‐GHz highly linear floating‐body CMOS LNA with switched gain control

Towards Power Centric Analog Design

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