A low-cost method for test and speed characterization of digital integrated circuit prototypes

Elrabaa, Muhammad E. S.; Al-Aghbari, Amran; Al-Asli, Mohammed

doi:10.1109/siecpc.2013.6550802

Cited by 3 publications

(1 citation statement)

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“…In order to emulate an ATE, a special purpose test processor that is capable of executing the test programs has been developed and implemented on an FPGA. 22 Also, another FPGA was used to emulate a DUT with four circuit IPs on board with specially developed test support circuitry (TSC). This test setup is used to show how the user can upload the test program to the DUT and download the results.…”

Section: Validationmentioning

confidence: 99%

Towards a Test Definition Language for Integrated Circuits

Alshayeb

Elrabaa

Hroub

et al. 2015

J CIRCUIT SYST COMP

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The Standard Test Interface Language (STIL) is the de-facto standard for transferring test data between the test generation environment and the test equipment. STIL's°exibility and extensibility facilitates its use as the sole input language for automatic test-pattern generation (ATPG). However, STIL format is complex and does not provide support for algorithmic interactive testing which necessitate the use of additional programming languages to do that. In this paper, we propose a new Test De¯nition Language for Integrated Circuits (TDLIC) based on the Extensible Markup Language (XML). TDLIC is a description language for de¯ning tests of digital ICs in a precise and reusable form. The proposed TDLIC provides a common platform for specifying test data as well as complex test procedures. A case study that includes a validation platform is used to show the full capabilities of TDLIC. The validation platform is an FPGA-based system that emulates the automatic test equipment and a prototype IC with four circuits to be tested.

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Section: Validationmentioning

confidence: 99%