A low-cost active antenna for short-range communication applications

Rigorous Investigation of Interactions between Passive RFID Tags by Means of Nonlinear/Electromagnetic Co-simulation

“…Figure 1 schematically depicts its building blocks. The basic principles of operation are similar to those developed in [2] but, the present design suppresses the need for an external battery. An AC/DC charge pump consisting of a 4-stage Schottky-diode capacitor network has been designed to rectify a portion of the received power as required for active device biasing.…”

“…A unique HB solving system encompassing the modulation and demodulation operating conditions is formulated, and is cast in the form where ED, EM are the sets of real and imaginary parts of the HB errors for the transceiver in the demodulation and modulation states, respectively, XD, XM are the corresponding state vectors, and Y(P) is the common linear subnetwork admittance matrix computed by EM simulation. Since any performance index is a function of the circuit state and of the passive subnetwork admittance parameters, a generic design specification may be synthetically formulated as FK [XK; Y(P)] > Gmin (2) where K stands for M or D. The tag is then optimized with respect to P by the space-mapping algorithm discussed in [5], with simultaneous specifications of the form (2) on both operating conditions. The effective isotropic radiated power (EIRP) is 500 mW in the 2.45 GHz IMS band.…”

Non-contact wafer probe using wireless probe cards

“…With growing complexity and density of devices per wafer area, the cost of testing a microchip is growing faster than the cost of manufacturing one [1]; and in some cases, the testing cost exceeds the manufacturing cost. Semiconductor testing has become a multi-billion dollar industry, leading to opportunities for the introduction of new testing technologies, like the wireless testing methodology [2][3][4]. Issues such as smaller pad size, increased pad density, increased signal input/output (I/O) frequencies, longer test times, mechanical reliability of low-k dielectric materials, and probe card contact and alignment are restricting the progress towards smaller, faster, and more economical integrated circuits [5].…”