2004
DOI: 10.1109/led.2004.825195
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A Logic Nanotechnology Featuring Strained-Silicon

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Cited by 480 publications
(191 citation statements)
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“…Moore's law [216] with recent advances such as strained silicon [217][218] and copper interconnects [219] helping to extend device scaling. Nevertheless, even with all of the recent research breakthroughs, low-k dielectrics have remained a constant impediment to the ITRS roadmap and ultimately threaten to restrict future device speeds (and dimensional scaling) [150].…”
Section: Low-k Dielectrics/proton Gated Devicesmentioning
confidence: 99%
“…Moore's law [216] with recent advances such as strained silicon [217][218] and copper interconnects [219] helping to extend device scaling. Nevertheless, even with all of the recent research breakthroughs, low-k dielectrics have remained a constant impediment to the ITRS roadmap and ultimately threaten to restrict future device speeds (and dimensional scaling) [150].…”
Section: Low-k Dielectrics/proton Gated Devicesmentioning
confidence: 99%
“…The strain changes the electronic band structure resulting in the change of carrier mobility [1][2][3][4][5]. While the electrostatics of strained MOSFETs has been studied, several research groups have reported the mobility characteristic in strained MOSFETs [1,6] or in unstrained MOSFETs [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…As a complimentary technique, Si 1-x Ge x alloys and C-doped Si (Si:C) have been introduced in advanced complimentary metal-semiconductor-oxide (CMOS) to control strain in Si for channel mobility enhancement. [1][2][3][4][5][6][7][8] Device miniaturization by conventional scaling and performance enhancement through introduction of new materials and structures will certainly continue.…”
Section: Introductionmentioning
confidence: 99%